From patchwork Thu Sep 14 01:26:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andes X-Patchwork-Id: 813680 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xt1hD6lmyz9t2l for ; Thu, 14 Sep 2017 11:50:36 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 9052EC21E4A; Thu, 14 Sep 2017 01:50:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9E2DEC21DF4; Thu, 14 Sep 2017 01:50:29 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 11200C21C4F; Thu, 14 Sep 2017 01:50:19 +0000 (UTC) Received: from ATCSQR.andestech.com (exmail.andestech.com [59.124.169.137]) by lists.denx.de (Postfix) with ESMTPS id C696CC21E4B for ; Thu, 14 Sep 2017 01:50:18 +0000 (UTC) Received: from mail.andestech.com (atcpcs16.andestech.com [10.0.1.222]) by ATCSQR.andestech.com with ESMTP id v8E1iENu063332; Thu, 14 Sep 2017 09:44:15 +0800 (GMT-8) (envelope-from uboot@andestech.com) Received: from app09.andestech.com (10.0.4.97) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.123.3; Thu, 14 Sep 2017 09:49:56 +0800 From: Andes To: , , Date: Thu, 14 Sep 2017 09:26:26 +0800 Message-ID: <1505352386-12196-1-git-send-email-uboot@andestech.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-Originating-IP: [10.0.4.97] X-DNSRBL: X-MAIL: ATCSQR.andestech.com v8E1iENu063332 Subject: [U-Boot] [PATCH 2/3] nds32: board: Support SPI driver. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: rick Add spi dts node and enable spi dm flash config. Signed-off-by: rick --- arch/nds32/dts/ae3xx.dts | 23 +++++++++++++++++++++++ configs/adp-ae3xx_defconfig | 10 +++++++++- include/configs/adp-ae3xx.h | 15 +++++++++++++-- 3 files changed, 45 insertions(+), 3 deletions(-) diff --git a/arch/nds32/dts/ae3xx.dts b/arch/nds32/dts/ae3xx.dts index 4221e4b..fbe6d74 100644 --- a/arch/nds32/dts/ae3xx.dts +++ b/arch/nds32/dts/ae3xx.dts @@ -8,6 +8,7 @@ aliases { uart0 = &serial0; ethernet0 = &mac0; + spi0 = &spi; } ; chosen { @@ -22,6 +23,12 @@ reg = <0x00000000 0x40000000>; }; + spiclk: virt_100mhz { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -69,4 +76,20 @@ device-width = <1>; }; + spi: spi@f0b00000 { + compatible = "andestech,atcspi200"; + reg = <0xf0b00000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <1>; + clocks = <&spiclk>; + interrupts = <3 4>; + flash@0 { + compatible = "spi-flash"; + spi-max-frequency = <50000000>; + reg = <0>; + spi-cpol; + spi-cpha; + }; + }; }; diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig index 9e1e5ec..c105395 100644 --- a/configs/adp-ae3xx_defconfig +++ b/configs/adp-ae3xx_defconfig @@ -5,6 +5,8 @@ CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="NDS32 # " CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y @@ -13,17 +15,23 @@ CONFIG_CMD_DATE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y -CONFIG_ENV_IS_IN_FLASH=y +CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_CLK=y CONFIG_MMC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y CONFIG_DM_ETH=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_NDS_AE3XX_SPI=y CONFIG_TIMER=y CONFIG_AE3XX_TIMER=y diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h index fc04934..977a755 100644 --- a/include/configs/adp-ae3xx.h +++ b/include/configs/adp-ae3xx.h @@ -231,14 +231,25 @@ /* max number of sectors on one chip */ #define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) -#define CONFIG_ENV_SECT_SIZE CONFIG_FLASH_SECTOR_SIZE #define CONFIG_SYS_MAX_FLASH_SECT 512 /* environments */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x140000) +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 +#define CONFIG_ENV_SPI_MODE 0 +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_OFFSET 0x140000 #define CONFIG_ENV_SIZE 8192 #define CONFIG_ENV_OVERWRITE + +/* SPI FLASH */ +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 1000000 +#define CONFIG_SF_DEFAULT_MODE 0 + /* * For booting Linux, the board info and command line data * have to be in the first 16 MB of memory, since this is