[U-Boot,8/8] arm: dts: rv1108: Add Saradc node at dtsi level

Message ID 1505302516-74864-1-git-send-email-david.wu@rock-chips.com
State Superseded
Delegated to: Philipp Tomsich
Headers show
Series
  • Add rockchip Saradc support
Related show

Commit Message

David Wu Sept. 13, 2017, 11:35 a.m.
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 arch/arm/dts/rv1108.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Philipp Tomsich Sept. 13, 2017, 8:07 p.m. | #1
> Signed-off-by: David Wu <david.wu@rock-chips.com>
> ---
>  arch/arm/dts/rv1108.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 

Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich Sept. 13, 2017, 8:08 p.m. | #2
> Signed-off-by: David Wu <david.wu@rock-chips.com>
> ---
>  arch/arm/dts/rv1108.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Patch

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 77ca24e..d6927ee 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -126,6 +126,17 @@ 
 		reg = <0x10300000 0x1000>;
 	};
 
+	saradc: saradc@1038c000 {
+		compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
+		reg = <0x1038c000 0x100>;
+		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clock-frequency = <1000000>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		status = "disabled";
+	};
+
 	pmugrf: syscon@20060000 {
 		compatible = "rockchip,rv1108-pmugrf", "syscon";
 		reg = <0x20060000 0x1000>;