Patchwork [U-Boot] mvgbe: enable the reception of packets with an odd number of preamble nibbles

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Submitter Klaus Flittner
Date Jan. 31, 2011, 7:40 p.m.
Message ID <20110131204025.1ffb0391@earth.lan>
Download mbox | patch
Permalink /patch/81217/
State Not Applicable
Headers show

Comments

Klaus Flittner - Jan. 31, 2011, 7:40 p.m.
With the current hardware initialisation of the driver all packets with
an odd number of preamble nibbles are dropped. Some switches seem to
send all packets with such an preamble.

According to the functional specifications of the marvell 88F6180,
6190, 6192 and 6281 the reception of such packets can be enabled by
setting bit 22 in register PSC1.

Signed-off-by: Klaus Flittner <klaus@flittner.org>
---
 drivers/net/mvgbe.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)
Wolfgang Denk - April 12, 2011, 6:49 p.m.
Dear Klaus Flittner,

In message <20110131204025.1ffb0391@earth.lan> you wrote:
> With the current hardware initialisation of the driver all packets with
> an odd number of preamble nibbles are dropped. Some switches seem to
> send all packets with such an preamble.
> 
> According to the functional specifications of the marvell 88F6180,
> 6190, 6192 and 6281 the reception of such packets can be enabled by
> setting bit 22 in register PSC1.
> 
> Signed-off-by: Klaus Flittner <klaus@flittner.org>
> ---
>  drivers/net/mvgbe.c |    3 +++
>  1 files changed, 3 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
> index c701f43..f1081a2 100644
> --- a/drivers/net/mvgbe.c
> +++ b/drivers/net/mvgbe.c
> @@ -446,6 +446,9 @@ static int mvgbe_init(struct eth_device *dev)
>         MVGBE_REG_WR(regs->psc0, MVGBE_MAX_RX_PACKET_9700BYTE
>                         | (MVGBE_REG_RD(regs->psc0) & MRU_MASK));
> 
> +       /* Receive packets with odd number of preamble nibbles */
> +       MVGBE_REG_BITS_SET(regs->psc1, 1 << 22);
> +
>         /* Enable port initially */
>         MVGBE_REG_BITS_SET(regs->psc0, MVGBE_SERIAL_PORT_EN);

Your patch is white space corrupted and does not apply:

Applying: mvgbe: enable the reception of packets with an odd number of preamble nibbles
Using index info to reconstruct a base tree...
error: patch failed: drivers/net/mvgbe.c:446
error: drivers/net/mvgbe.c: patch does not apply
Did you hand edit your patch?
It does not apply to blobs recorded in its index.
Cannot fall back to three-way merge.
Patch failed at 0001 mvgbe: enable the reception of packets with an odd number of preamble nibbles

Please resubmit after fixing your mailer problems.

Best regards,

Wolfgang Denk
Prafulla Wadaskar - April 13, 2011, 2:11 p.m.
> -----Original Message-----
> From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de]
> On Behalf Of Wolfgang Denk
> Sent: Wednesday, April 13, 2011 12:20 AM
> To: Klaus Flittner
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH] mvgbe: enable the reception of packets
> with an odd number of preamble nibbles
> 
> Dear Klaus Flittner,
> 
> In message <20110131204025.1ffb0391@earth.lan> you wrote:
> > With the current hardware initialisation of the driver all packets
> with
> > an odd number of preamble nibbles are dropped. Some switches seem to
> > send all packets with such an preamble.
> >
> > According to the functional specifications of the marvell 88F6180,
> > 6190, 6192 and 6281 the reception of such packets can be enabled by
> > setting bit 22 in register PSC1.

Klaus Flittner

Do you thing setting this by default will not disturb functionality on other hardware? If so, how about encapsulating it in #ifdef with SYS_CONFIG_xx ?

Regards..
Prafulla . .

Patch

diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
index c701f43..f1081a2 100644
--- a/drivers/net/mvgbe.c
+++ b/drivers/net/mvgbe.c
@@ -446,6 +446,9 @@  static int mvgbe_init(struct eth_device *dev)
        MVGBE_REG_WR(regs->psc0, MVGBE_MAX_RX_PACKET_9700BYTE
                        | (MVGBE_REG_RD(regs->psc0) & MRU_MASK));

+       /* Receive packets with odd number of preamble nibbles */
+       MVGBE_REG_BITS_SET(regs->psc1, 1 << 22);
+
        /* Enable port initially */
        MVGBE_REG_BITS_SET(regs->psc0, MVGBE_SERIAL_PORT_EN);