diff mbox series

[SPARC] Fix PR target/80897

Message ID 3663443.W5a8jlDd2i@polaris
State New
Headers show
Series [SPARC] Fix PR target/80897 | expand

Commit Message

Eric Botcazou Sept. 7, 2017, 3:53 p.m. UTC 
This is the Ada bootstrap failure on SPARC64/Linux that I worked around at 
some point; it turns out that we can do something plausible in the back-end.

Tested on SPARC64/Linux, applied on mainline.


2017-09-07  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/80897
	* config/sparc/sparc.c (sparc_emit_set_symbolic_const64): Deal with
	too large offsets.


2017-09-07  Eric Botcazou  <ebotcazou@adacore.com>

	* gnat.dg/opt67.adb: New test.
	* gnat.dg/opt67_pkg.ad[sb]: New helper.
diff mbox series

Patch

Index: config/sparc/sparc.c
===================================================================
--- config/sparc/sparc.c	(revision 251811)
+++ config/sparc/sparc.c	(working copy)
@@ -2159,9 +2159,25 @@  sparc_emit_set_const32 (rtx op0, rtx op1
 void
 sparc_emit_set_symbolic_const64 (rtx op0, rtx op1, rtx temp)
 {
-  rtx temp1, temp2, temp3, temp4, temp5;
+  rtx cst, temp1, temp2, temp3, temp4, temp5;
   rtx ti_temp = 0;
 
+  /* Deal with too large offsets.  */
+  if (GET_CODE (op1) == CONST
+      && GET_CODE (XEXP (op1, 0)) == PLUS
+      && CONST_INT_P (cst = XEXP (XEXP (op1, 0), 1))
+      && trunc_int_for_mode (INTVAL (cst), SImode) != INTVAL (cst))
+    {
+      gcc_assert (!temp);
+      temp1 = gen_reg_rtx (DImode);
+      temp2 = gen_reg_rtx (DImode);
+      sparc_emit_set_const64 (temp2, cst);
+      sparc_emit_set_symbolic_const64 (temp1, XEXP (XEXP (op1, 0), 0),
+				       NULL_RTX);
+      emit_insn (gen_rtx_SET (op0, gen_rtx_PLUS (DImode, temp1, temp2)));
+      return;
+    }
+
   if (temp && GET_MODE (temp) == TImode)
     {
       ti_temp = temp;