From patchwork Sun Jan 30 05:03:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Zhang X-Patchwork-Id: 81001 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id B6D48B70F4 for ; Sun, 30 Jan 2011 18:38:51 +1100 (EST) Received: (qmail 952 invoked by alias); 30 Jan 2011 07:38:08 -0000 Received: (qmail 687 invoked by uid 22791); 30 Jan 2011 07:37:49 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sun, 30 Jan 2011 05:04:16 +0000 Received: (qmail 8805 invoked from network); 30 Jan 2011 05:04:12 -0000 Received: from unknown (HELO ?117.131.115.60?) (jie@127.0.0.2) by mail.codesourcery.com with ESMTPA; 30 Jan 2011 05:04:12 -0000 Message-ID: <4D44F117.4060005@codesourcery.com> Date: Sun, 30 Jan 2011 13:03:19 +0800 From: Jie Zhang User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.13) Gecko/20101213 Lightning/1.0b2 Icedove/3.1.7 MIME-Version: 1.0 To: Richard Earnshaw CC: gcc-patches@gcc.gnu.org Subject: Re: [ARM] [1/2] Make ARM_LEGITIMIZE_RELOAD_ADDRESS be a function References: <4D119D62.3010407@codesourcery.com> <1296224795.9738.39.camel@e102346-lin.cambridge.arm.com> <4D42F2FC.6080306@codesourcery.com> <1296234204.9738.81.camel@e102346-lin.cambridge.arm.com> <4D4387F2.4020907@codesourcery.com> In-Reply-To: <4D4387F2.4020907@codesourcery.com> X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On 01/29/2011 11:22 AM, Jie Zhang wrote: > On 01/29/2011 01:03 AM, Richard Earnshaw wrote: >> Also, I notice that the same problem has crept into >> thumb_legitimize_reload_address. Perhaps you could correct that too in >> a similar manner. Consider such a patch pre-approved (but please commit >> it separately from the ARM one). >> > I will see if I can prepare a patch. > I take a look. Yeah, there are some issues in thumb_legitimize_reload_address. 1. thumb_legitimize_reload_address uses REG_MODE_OK_FOR_REG_BASE_P, which will use an undefined macro ARM_REGNO_OK_FOR_INDEX_P if REG_OK_STRICT was defined. But since thumb_legitimize_reload_address is defined in arm.c, in which REG_OK_STRICT is not defined, this does not cause a compile time bug now. 2. I tried to use REGNO_OK_FOR_INDEX_P instead of ARM_REGNO_OK_FOR_INDEX_P and apply the attached patch. GCC would have an ICE on the attached test case, which is reduced from a newlib source file, with options "-O2 -mthumb". 3. Currently we use thumb_legitimize_reload_address to handle TARGET_THUMB1 and TARGET_THUMB2. It seems not good. I think we may need to use separate functions for each case. 4. The code piece which uses REG_MODE_OK_FOR_REG_BASE_P in thumb_legitimize_reload_address was added to fix PR target/23436. That bug cannot be reproduced on the latest GCC trunk even after commenting out that code piece. Maybe we don't need that code piece now? So it seems there is no simple fix for this problem. But I may have not much time for this now. Regards, Index: config/arm/arm.c =================================================================== --- config/arm/arm.c (revision 169386) +++ config/arm/arm.c (working copy) @@ -6477,8 +6477,8 @@ thumb_legitimize_reload_address (rtx *x_ if (GET_CODE (x) == PLUS && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1)) - && !REG_MODE_OK_FOR_REG_BASE_P (XEXP (x, 0), mode) - && !REG_MODE_OK_FOR_REG_BASE_P (XEXP (x, 1), mode)) + && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (x, 0))) + && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (x, 1)))) { rtx orig_x = x;