| Message ID | 20170904104655.29103-1-ran.wang_1@nxp.com |
|---|---|
| State | Accepted |
| Commit | 9a609a88004e5be73d873e229f1b61bd52c749f7 |
| Delegated to: | York Sun |
| Headers | show
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[U-Boot,v5,1/9] armv8: Add scfg_clrsetbits_32(), scfg_clrbits_32()
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On 09/04/2017 04:04 AM, Ran Wang wrote: > Some erratum patch might need it to program registers. > > Signed-off-by: Ran Wang <ran.wang_1@nxp.com> > --- > Change in v4: > New patch file Applied to fsl-qoriq master. Thanks. York
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index aeb12739aa..b0b8ed5c66 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -29,9 +29,13 @@ #ifdef CONFIG_SYS_FSL_CCSR_SCFG_LE #define scfg_in32(a) in_le32(a) #define scfg_out32(a, v) out_le32(a, v) +#define scfg_clrbits32(addr, clear) clrbits_le32(addr, clear) +#define scfg_clrsetbits32(addr, clear, set) clrsetbits_le32(addr, clear, set) #elif defined(CONFIG_SYS_FSL_CCSR_SCFG_BE) #define scfg_in32(a) in_be32(a) #define scfg_out32(a, v) out_be32(a, v) +#define scfg_clrbits32(addr, clear) clrbits_be32(addr, clear) +#define scfg_clrsetbits32(addr, clear, set) clrsetbits_be32(addr, clear, set) #endif #ifdef CONFIG_SYS_FSL_PEX_LUT_LE
Some erratum patch might need it to program registers. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> --- Change in v4: New patch file arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 ++++ 1 file changed, 4 insertions(+)