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[2a01:cb08:8610:7300:d598:98fc:beac:d7d5]) by smtp.gmail.com with ESMTPSA id c139sm6351605wmh.32.2017.09.03.06.18.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 03 Sep 2017 06:18:00 -0700 (PDT) From: "Yann E. MORIN" To: buildroot@buildroot.org Date: Sun, 3 Sep 2017 15:17:47 +0200 Message-Id: <3447db07fd4678fa60261dd0e400218072d33482.1504444617.git.yann.morin.1998@free.fr> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: Cc: Thomas Petazzoni , "Yann E. MORIN" Subject: [Buildroot] [PATCH 7/9] arch/arm: add some non-cortex armv8a cores X-BeenThere: buildroot@busybox.net X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Discussion and development of buildroot List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: buildroot-bounces@busybox.net Sender: "buildroot" Some need gcc-5, some gcc-6 and some gcc-7. The thunderx familly does not build in 32-bit mode (gcc complains that the CPU is unknown, and even gcc master only knows them as aarch64-only). Signed-off-by: "Yann E. MORIN" Cc: Thomas Petazzoni --- arch/Config.in.arm | 77 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/arch/Config.in.arm b/arch/Config.in.arm index 65caf7aa80..40d6ae18b8 100644 --- a/arch/Config.in.arm +++ b/arch/Config.in.arm @@ -332,6 +332,74 @@ config BR2_cortex_a73_a53 select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_exynos_m1 + bool "exynos-m1" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 +config BR2_falkor + bool "falkor" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_qdf24xx + bool "qdf24xx" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 +if BR2_ARCH_IS_64 +config BR2_thunderx + bool "thunderx" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 +config BR2_thunderxt81 + bool "thunderxt81" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_thunderxt83 + bool "thunderxt83" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_thunderxt88 + bool "thunderxt88" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_thunderxt88p1 + bool "thunderxt88p1" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +endif # BR2_ARCH_IS_64 +config BR2_xgene1 + bool "xgene1" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 endchoice config BR2_ARM_ENABLE_NEON @@ -628,6 +696,15 @@ config BR2_GCC_TARGET_CPU default "cortex-a73" if BR2_cortex_a73 default "cortex-a73.cortex-a35" if BR2_cortex_a73_a35 default "cortex-a73.cortex-a53" if BR2_cortex_a73_a53 + default "exynos-m1" if BR2_exynos_m1 + default "falkor" if BR2_falkor + default "qdf24xx" if BR2_qdf24xx + default "thunderx" if BR2_thunderx + default "thunderxt81" if BR2_thunderxt81 + default "thunderxt83" if BR2_thunderxt83 + default "thunderxt88" if BR2_thunderxt88 + default "thunderxt88p1" if BR2_thunderxt88p1 + default "xgene1" if BR2_xgene1 config BR2_GCC_TARGET_ABI default "aapcs-linux" if BR2_arm || BR2_armeb