From patchwork Fri Sep 1 14:53:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 808712 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bg19PTs1"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xkMgx27RPz9t2d for ; Sat, 2 Sep 2017 00:53:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752182AbdIAOxs (ORCPT ); Fri, 1 Sep 2017 10:53:48 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:33544 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752103AbdIAOxr (ORCPT ); Fri, 1 Sep 2017 10:53:47 -0400 Received: by mail-wr0-f195.google.com with SMTP id k94so224270wrc.0; Fri, 01 Sep 2017 07:53:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YplCAasDEAfh7GvT+OrGGQXgKBJRx8MaTAZG4PHX5QE=; b=bg19PTs1UOoKQyy70k3/iCc12uRi5ICFXtZE73cyQ2ATVDIL/UoAylT622Vel/58UL IstoDlV6IROoXoSAbJZALFKVX2hE7jh7u9TMn7Q6nY8O/o56Y5VYTl8MPMMUomLZVONI 2nb2C91oPqumjGRZwtSbqvPCoNwPsWWfRkz4cRFpBIKIlxUaLgwjsmBaOIdt0hdG8JaN 1VHVWiJp4ZEyNloyfKkfFN5lf3M5LFf4RjICrDK/gRdgV+GSeyeesW6MDdDGKycq5GNp QhFzlyJnlCI0eQIw8xhbHll3bwEzL5EmqWPA7WQISfQrGctRBPuQhmrkPSYydBgMK0Hb jNsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YplCAasDEAfh7GvT+OrGGQXgKBJRx8MaTAZG4PHX5QE=; b=LtbUrlU0GxTF9toCIf4ka/pnm0/kR89tZ6Pbu678g2pw8sG6aHkGZv6raUxuNhzlyj TeTSBlvoAqRVppgFEeTTTfcUmFX3wAr8rWLmtDY2bAr8CLH3gi4JGHxMPLMucY4rRjrq g8+ocWbhMutc6BO89KUFPrjJqPfxl7KdDwYWIHCH4I6f3uJjbFLRHIQM6MonxNwOJku/ 5bToWb0IMsCDM4Fd7CpStdfh3va5hIksE/a4u+FpATtWMNiGp0LEcdesBK6pxntKg09f ujmqryz3vx+8nkyyJPmdemyLed89OFK6sgPcDoqVRcuOuMk3Kgs8P/nt4/tOYXlT02da 2+kA== X-Gm-Message-State: AHPjjUidnHwRJId4hz0tpM2zAkb7xJ4AypcqAoiKr2Zur6lWWWZEITgH VIqgtWn9sYj+XQ== X-Google-Smtp-Source: ADKCNb7qlk6KHbD5AZ/QjypeNvPuOUVp5lPNc2HFgj5pmFnDoMZ6Ez+SiJdSCruXoNWzWGXtObEw8g== X-Received: by 10.223.142.87 with SMTP id n81mr1314860wrb.164.1504277626554; Fri, 01 Sep 2017 07:53:46 -0700 (PDT) Received: from localhost (p200300E41BD6D60076D02BFFFE273F51.dip0.t-ipconnect.de. [2003:e4:1bd6:d600:76d0:2bff:fe27:3f51]) by smtp.gmail.com with ESMTPSA id l64sm357690wmb.12.2017.09.01.07.53.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Sep 2017 07:53:45 -0700 (PDT) From: Thierry Reding To: Michael Turquette , Stephen Boyd Cc: Peter De Schrijver , Jonathan Hunter , linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 2/4] clk: tegra: Add peripheral clock registration helper Date: Fri, 1 Sep 2017 16:53:41 +0200 Message-Id: <20170901145343.19890-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170901145343.19890-1-thierry.reding@gmail.com> References: <20170901145343.19890-1-thierry.reding@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding There is a common pattern that registers individual peripheral clocks from an initialization table. Add a common implementation to remove the duplication from various call sites. Signed-off-by: Thierry Reding --- drivers/clk/tegra/clk-periph.c | 8 ++++++++ drivers/clk/tegra/clk.h | 3 +++ 2 files changed, 11 insertions(+) diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c index cf80831de79d..9475c00b7cf9 100644 --- a/drivers/clk/tegra/clk-periph.c +++ b/drivers/clk/tegra/clk-periph.c @@ -203,3 +203,11 @@ struct clk *tegra_clk_register_periph_nodiv(const char *name, return _tegra_clk_register_periph(name, parent_names, num_parents, periph, clk_base, offset, CLK_SET_RATE_PARENT); } + +struct clk *tegra_clk_register_periph_data(void __iomem *clk_base, + struct tegra_periph_init_data *init) +{ + return _tegra_clk_register_periph(init->name, init->p.parent_names, + init->num_parents, &init->periph, + clk_base, init->offset, init->flags); +} diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 872f1189ad7f..3b2763df51c2 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -662,6 +662,9 @@ struct tegra_periph_init_data { _clk_num, _gate_flags, _clk_id,\ NULL, 0, NULL) +struct clk *tegra_clk_register_periph_data(void __iomem *clk_base, + struct tegra_periph_init_data *init); + /** * struct clk_super_mux - super clock *