Message ID | 1503965694-10794-36-git-send-email-mdroth@linux.vnet.ibm.com |
---|---|
State | New |
Headers | show
Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=<UNKNOWN>) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xh8xt03G7z9s7M for <incoming@patchwork.ozlabs.org>; Tue, 29 Aug 2017 10:43:14 +1000 (AEST) Received: from localhost ([::1]:42029 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>) id 1dmUcZ-0008Ux-QF for incoming@patchwork.ozlabs.org; Mon, 28 Aug 2017 20:43:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47970) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <mdroth@linux.vnet.ibm.com>) id 1dmUCQ-0001EN-U5 for qemu-devel@nongnu.org; Mon, 28 Aug 2017 20:16:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from <mdroth@linux.vnet.ibm.com>) id 1dmUCN-0005QF-MP for qemu-devel@nongnu.org; Mon, 28 Aug 2017 20:16:10 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:56940 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from <mdroth@linux.vnet.ibm.com>) id 1dmUCN-0005Pj-Gs for qemu-devel@nongnu.org; Mon, 28 Aug 2017 20:16:07 -0400 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v7T0ED4s099779 for <qemu-devel@nongnu.org>; Mon, 28 Aug 2017 20:16:07 -0400 Received: from e33.co.us.ibm.com (e33.co.us.ibm.com [32.97.110.151]) by mx0b-001b2d01.pphosted.com with ESMTP id 2cmr22yk3y-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for <qemu-devel@nongnu.org>; Mon, 28 Aug 2017 20:16:06 -0400 Received: from localhost by e33.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Series |
Patch Round-up for stable 2.9.1, freeze on 2017-09-04
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expand
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diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c index 28c5be1..8140564 100644 --- a/hw/net/e1000e_core.c +++ b/hw/net/e1000e_core.c @@ -2454,14 +2454,20 @@ e1000e_set_ics(E1000ECore *core, int index, uint32_t val) static void e1000e_set_icr(E1000ECore *core, int index, uint32_t val) { + uint32_t icr = 0; if ((core->mac[ICR] & E1000_ICR_ASSERTED) && (core->mac[CTRL_EXT] & E1000_CTRL_EXT_IAME)) { trace_e1000e_irq_icr_process_iame(); e1000e_clear_ims_bits(core, core->mac[IAM]); } - trace_e1000e_irq_icr_write(val, core->mac[ICR], core->mac[ICR] & ~val); - core->mac[ICR] &= ~val; + icr = core->mac[ICR] & ~val; + /* Windows driver expects that the "receive overrun" bit and other + * ones to be cleared when the "Other" bit (#24) is cleared. + */ + icr = (val & E1000_ICR_OTHER) ? (icr & ~E1000_ICR_OTHER_CAUSES) : icr; + trace_e1000e_irq_icr_write(val, core->mac[ICR], icr); + core->mac[ICR] = icr; e1000e_update_interrupt_state(core); }