From patchwork Thu Jan 27 11:10:03 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Rozenman X-Patchwork-Id: 80650 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2E3781007D1 for ; Thu, 27 Jan 2011 22:15:02 +1100 (EST) Received: from localhost ([127.0.0.1]:52513 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PiPoY-0003H1-TW for incoming@patchwork.ozlabs.org; Thu, 27 Jan 2011 06:14:59 -0500 Received: from [140.186.70.92] (port=45242 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PiPkB-00026L-SI for qemu-devel@nongnu.org; Thu, 27 Jan 2011 06:10:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PiPkA-0003YC-16 for qemu-devel@nongnu.org; Thu, 27 Jan 2011 06:10:27 -0500 Received: from mail-iy0-f173.google.com ([209.85.210.173]:34719) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PiPk9-0003Y3-QV for qemu-devel@nongnu.org; Thu, 27 Jan 2011 06:10:25 -0500 Received: by iye19 with SMTP id 19so1417696iye.4 for ; Thu, 27 Jan 2011 03:10:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:from:date:message-id:subject:to :content-type; bh=EWUpjWyHTlcMz82gyFKqhkKZgZth0z6yb6nMZUx4znU=; b=u05xbxjOd7b/mUUALSmOAq9FzR7l44nrrEJtDROiI20X4uZLPqTRuwfkckK1/P9Mfu F9z5YNDWPcQzgp6LGb4nzYOb8P0YM15UvMI89dEaf/SZ9ONprUMFP75RW/M0C5muinbK OXP8sQCOioMxJQRhgWQVOx2LcF0dVt5SeSg3c= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=rkXb47OTL7A26EVo1v9L4L0i18tb1xo5wWeQq4sGFKzvOXN03Jc6by2hw4ObKDqc4S YySOu3N8mKCb5hRcGEjHd8t7M8/vVk8TGGDNNPN7IWGlQAkmGK+2MvL2COtmlxnZ3nwH NzteiJVbZtl8d8YF9nlqNt5+yIxP8bDkwqUy8= Received: by 10.42.179.194 with SMTP id br2mr1938929icb.339.1296126624872; Thu, 27 Jan 2011 03:10:24 -0800 (PST) MIME-Version: 1.0 Received: by 10.42.108.7 with HTTP; Thu, 27 Jan 2011 03:10:03 -0800 (PST) From: Alex Rozenman Date: Thu, 27 Jan 2011 13:10:03 +0200 Message-ID: To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Subject: [Qemu-devel] [PATCH] Added ppc440x6 and ppc440x6f cores. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Hi, Small patch adding ppc440x6 cores. Please push. From 96f21d28bc9dc7404b664a890da299fdaaf86667 Mon Sep 17 00:00:00 2001 From: Alex Rozenman Date: Thu, 27 Jan 2011 13:06:32 +0200 Subject: [PATCH] Added ppc440x6 and ppc440x6f cores. --- target-ppc/translate_init.c | 42 ++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 40 insertions(+), 2 deletions(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index dfcd949..bc83e83 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -1403,7 +1403,7 @@ static void gen_spr_BookE (CPUPPCState *env, uint64_t ivor_mask) /* XXX : not implemented */ spr_register(env, SPR_BOOKE_DBCR0, "DBCR0", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_40x_dbcr0, 0x00000000); /* XXX : not implemented */ spr_register(env, SPR_BOOKE_DBCR1, "DBCR1", @@ -1464,7 +1464,7 @@ static void gen_spr_BookE (CPUPPCState *env, uint64_t ivor_mask) 0x00000000); spr_register(env, SPR_BOOKE_DECAR, "DECAR", SPR_NOACCESS, SPR_NOACCESS, - SPR_NOACCESS, &spr_write_generic, + SPR_NOACCESS, &spr_write_40x_pit, 0x00000000); /* SPRGs */ spr_register(env, SPR_USPRG0, "USPRG0", @@ -3658,6 +3658,39 @@ static void init_proc_440x5 (CPUPPCState *env) ppc40x_irq_init(env); } +/* PowerPC 440x6 */ +#define POWERPC_INSNS_440x6 (POWERPC_INSNS_440x5 | PPC_DCRX | PPC_DCRUX) +#define POWERPC_MSRM_440x6 (POWERPC_MSRM_440x5) +#define POWERPC_MMU_440x6 (POWERPC_MMU_440x5) +#define POWERPC_EXCP_440x6 (POWERPC_EXCP_440x5) +#define POWERPC_INPUT_440x6 (POWERPC_INPUT_440x5) +#define POWERPC_BFDM_440x6 (POWERPC_BFDM_440x5) +#define POWERPC_FLAG_440x6 (POWERPC_FLAG_440x5) +#define check_pow_440x6 check_pow_440x5 + +static void init_proc_440x6 (CPUPPCState *env) +{ + init_proc_440x5 (env); +} + +/* PowerPC 440x6f */ +#define POWERPC_INSNS_440x6f (POWERPC_INSNS_440x6 | PPC_FLOAT | \ + PPC_FLOAT_FRES | PPC_FLOAT_FSEL | \ + PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \ + PPC_FLOAT_STFIWX) +#define POWERPC_MSRM_440x6f (POWERPC_MSRM_440x6) +#define POWERPC_MMU_440x6f (POWERPC_MMU_440x6) +#define POWERPC_EXCP_440x6f (POWERPC_EXCP_440x6) +#define POWERPC_INPUT_440x6f (POWERPC_INPUT_440x6) +#define POWERPC_BFDM_440x6f (POWERPC_BFDM_440x6) +#define POWERPC_FLAG_440x6f (POWERPC_FLAG_440x6) +#define check_pow_440x6f check_pow_440x6 + +static void init_proc_440x6f (CPUPPCState *env) +{ + init_proc_440x6 (env); +} + /* PowerPC 460 (guessed) */ #define POWERPC_INSNS_460 (PPC_INSNS_BASE | PPC_STRING | \ PPC_DCR | PPC_DCRX | PPC_DCRUX | \ @@ -6536,6 +6569,8 @@ enum { CPU_POWERPC_440A4 = xxx, #endif CPU_POWERPC_440_XILINX = 0x7ff21910, + CPU_POWERPC_440x6 = 0x7ff21910, + CPU_POWERPC_440x6f = 0x7ff21910, #if 0 CPU_POWERPC_440A5 = xxx, #endif @@ -7466,6 +7501,9 @@ static const ppc_def_t ppc_defs[] = { #endif /* PowerPC 440 Xilinx 5 */ POWERPC_DEF("440-Xilinx", CPU_POWERPC_440_XILINX, 440x5), + /* PowerPC 440x6 */ + POWERPC_DEF("440x6", CPU_POWERPC_440x6, 440x6), + POWERPC_DEF("440x6f", CPU_POWERPC_440x6f, 440x6f), #if defined (TODO) /* PowerPC 440 A5 */ POWERPC_DEF("440A5", CPU_POWERPC_440A5, 440x5), -- 1.7.0.4