Patchwork [v2,3/5] pci/pcie: make pci_find_device() ARI aware.

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Submitter Isaku Yamahata
Date Jan. 27, 2011, 6:56 a.m.
Message ID <aa724197e1561e5d2752ddde4f5031b050161414.1296111201.git.yamahata@valinux.co.jp>
Download mbox | patch
Permalink /patch/80601/
State New
Headers show

Comments

Isaku Yamahata - Jan. 27, 2011, 6:56 a.m.
make pci_find_device() ARI aware.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pci.c  |    6 ++++++
 hw/pci.h  |   42 ++++++++++++++++++++++++++++++++++++++++++
 hw/pcie.c |   13 -------------
 hw/pcie.h |    1 -
 4 files changed, 48 insertions(+), 14 deletions(-)
Michael S. Tsirkin - Jan. 27, 2011, 7:30 a.m.
On Thu, Jan 27, 2011 at 03:56:37PM +0900, Isaku Yamahata wrote:
> make pci_find_device() ARI aware.
> 
> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>

I moved the function to pci.c and renamed it to
pci_devfn_enabled (it does not deal with the slot anymore).

> ---
>  hw/pci.c  |    6 ++++++
>  hw/pci.h  |   42 ++++++++++++++++++++++++++++++++++++++++++
>  hw/pcie.c |   13 -------------
>  hw/pcie.h |    1 -
>  4 files changed, 48 insertions(+), 14 deletions(-)
> 
> diff --git a/hw/pci.c b/hw/pci.c
> index 899b23d..471d4d7 100644
> --- a/hw/pci.c
> +++ b/hw/pci.c
> @@ -1604,11 +1604,17 @@ PCIBus *pci_find_bus(PCIBus *bus, int bus_num)
>  
>  PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn)
>  {
> +    PCIDevice *d;
>      bus = pci_find_bus(bus, bus_num);
>  
>      if (!bus)
>          return NULL;
>  
> +    d = bus->parent_dev;
> +    /* ARI: See the comment above the pcie_check_slot() for details */
> +    if (d && !pcie_check_slot(d, devfn)) {
> +        return NULL;
> +    }
>      return bus->devices[devfn];
>  }
>  
> diff --git a/hw/pci.h b/hw/pci.h
> index 72025b1..2266a47 100644
> --- a/hw/pci.h
> +++ b/hw/pci.h
> @@ -467,4 +467,46 @@ static inline uint32_t pci_config_size(const PCIDevice *d)
>      return pci_is_express(d) ? PCIE_CONFIG_SPACE_SIZE : PCI_CONFIG_SPACE_SIZE;
>  }
>  
> +/*
> + * Although this function should be in pcie.h ideally,
> + * it is here because pci.h depends on pcie.h and this function depdnds
> + * on pci.h
> + *
> + * 6.13 Alternative routing-ID Interpretation(ARI)
> + * 7.8.16 Device control 2 register
> + *   ARI forwarding Enable
> + *
> + * With PCI Express Endpoints, there's a single device behind
> + * each downstream port bus, and bits 3:7 of the function number get
> + * encoded in the slot number (the Express spec calls it the Device
> + * Number). This allows > 8 functions, but
> + * these extended functions are only accessible when the
> + * Alternative routing-ID Interpretation (ARI)
> + * capability is enabled in the root/downstream port. With that capability
> + * disabled the port enforces the Device Number field being 0.
> + */
> +static inline bool pcie_check_slot(const PCIDevice *dev, uint8_t devfn)
> +{
> +    uint8_t type;
> +
> +    if (!pci_is_express(dev)) {
> +        return true;
> +    }
> +
> +    type = pcie_cap_get_type(dev);
> +    if (!(type == PCI_EXP_TYPE_ROOT_PORT ||
> +          type == PCI_EXP_TYPE_DOWNSTREAM)) {
> +        return true;
> +    }
> +
> +    if (!PCI_SLOT(devfn)) {
> +        /* With ARI, this means function < 8.
> +           functions < 8 are always accesible. */
> +        return true;
> +    }
> +
> +    return pci_get_long(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL2) &
> +        PCI_EXP_DEVCTL2_ARI;
> +}
> +
>  #endif
> diff --git a/hw/pcie.c b/hw/pcie.c
> index 6a113a9..006e2a8 100644
> --- a/hw/pcie.c
> +++ b/hw/pcie.c
> @@ -424,19 +424,6 @@ void pcie_cap_ari_reset(PCIDevice *dev)
>      pci_long_test_and_clear_mask(devctl2, PCI_EXP_DEVCTL2_ARI);
>  }
>  
> -bool pcie_cap_is_ari_enabled(const PCIDevice *dev)
> -{
> -    if (!pci_is_express(dev)) {
> -        return false;
> -    }
> -    if (!dev->exp.exp_cap) {
> -        return false;
> -    }
> -
> -    return pci_get_long(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL2) &
> -        PCI_EXP_DEVCTL2_ARI;
> -}
> -
>  /**************************************************************************
>   * pci express extended capability allocation functions
>   * uint16_t ext_cap_id (16 bit)
> diff --git a/hw/pcie.h b/hw/pcie.h
> index bc909e2..ee3988f 100644
> --- a/hw/pcie.h
> +++ b/hw/pcie.h
> @@ -119,7 +119,6 @@ void pcie_cap_flr_write_config(PCIDevice *dev,
>  
>  void pcie_cap_ari_init(PCIDevice *dev);
>  void pcie_cap_ari_reset(PCIDevice *dev);
> -bool pcie_cap_is_ari_enabled(const PCIDevice *dev);
>  
>  /* PCI express extended capability helper functions */
>  uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id);
> -- 
> 1.7.1.1

Patch

diff --git a/hw/pci.c b/hw/pci.c
index 899b23d..471d4d7 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1604,11 +1604,17 @@  PCIBus *pci_find_bus(PCIBus *bus, int bus_num)
 
 PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn)
 {
+    PCIDevice *d;
     bus = pci_find_bus(bus, bus_num);
 
     if (!bus)
         return NULL;
 
+    d = bus->parent_dev;
+    /* ARI: See the comment above the pcie_check_slot() for details */
+    if (d && !pcie_check_slot(d, devfn)) {
+        return NULL;
+    }
     return bus->devices[devfn];
 }
 
diff --git a/hw/pci.h b/hw/pci.h
index 72025b1..2266a47 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -467,4 +467,46 @@  static inline uint32_t pci_config_size(const PCIDevice *d)
     return pci_is_express(d) ? PCIE_CONFIG_SPACE_SIZE : PCI_CONFIG_SPACE_SIZE;
 }
 
+/*
+ * Although this function should be in pcie.h ideally,
+ * it is here because pci.h depends on pcie.h and this function depdnds
+ * on pci.h
+ *
+ * 6.13 Alternative routing-ID Interpretation(ARI)
+ * 7.8.16 Device control 2 register
+ *   ARI forwarding Enable
+ *
+ * With PCI Express Endpoints, there's a single device behind
+ * each downstream port bus, and bits 3:7 of the function number get
+ * encoded in the slot number (the Express spec calls it the Device
+ * Number). This allows > 8 functions, but
+ * these extended functions are only accessible when the
+ * Alternative routing-ID Interpretation (ARI)
+ * capability is enabled in the root/downstream port. With that capability
+ * disabled the port enforces the Device Number field being 0.
+ */
+static inline bool pcie_check_slot(const PCIDevice *dev, uint8_t devfn)
+{
+    uint8_t type;
+
+    if (!pci_is_express(dev)) {
+        return true;
+    }
+
+    type = pcie_cap_get_type(dev);
+    if (!(type == PCI_EXP_TYPE_ROOT_PORT ||
+          type == PCI_EXP_TYPE_DOWNSTREAM)) {
+        return true;
+    }
+
+    if (!PCI_SLOT(devfn)) {
+        /* With ARI, this means function < 8.
+           functions < 8 are always accesible. */
+        return true;
+    }
+
+    return pci_get_long(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL2) &
+        PCI_EXP_DEVCTL2_ARI;
+}
+
 #endif
diff --git a/hw/pcie.c b/hw/pcie.c
index 6a113a9..006e2a8 100644
--- a/hw/pcie.c
+++ b/hw/pcie.c
@@ -424,19 +424,6 @@  void pcie_cap_ari_reset(PCIDevice *dev)
     pci_long_test_and_clear_mask(devctl2, PCI_EXP_DEVCTL2_ARI);
 }
 
-bool pcie_cap_is_ari_enabled(const PCIDevice *dev)
-{
-    if (!pci_is_express(dev)) {
-        return false;
-    }
-    if (!dev->exp.exp_cap) {
-        return false;
-    }
-
-    return pci_get_long(dev->config + dev->exp.exp_cap + PCI_EXP_DEVCTL2) &
-        PCI_EXP_DEVCTL2_ARI;
-}
-
 /**************************************************************************
  * pci express extended capability allocation functions
  * uint16_t ext_cap_id (16 bit)
diff --git a/hw/pcie.h b/hw/pcie.h
index bc909e2..ee3988f 100644
--- a/hw/pcie.h
+++ b/hw/pcie.h
@@ -119,7 +119,6 @@  void pcie_cap_flr_write_config(PCIDevice *dev,
 
 void pcie_cap_ari_init(PCIDevice *dev);
 void pcie_cap_ari_reset(PCIDevice *dev);
-bool pcie_cap_is_ari_enabled(const PCIDevice *dev);
 
 /* PCI express extended capability helper functions */
 uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id);