Patchwork target-arm: Fix Neon vsra instructions.

login
register
mail settings
Submitter Christophe LYON
Date Jan. 25, 2011, 5:18 p.m.
Message ID <4D3F05D0.9070906@st.com>
Download mbox | patch
Permalink /patch/80391/
State New
Headers show

Comments

Christophe LYON - Jan. 25, 2011, 5:18 p.m.
This patch fixes the errors reported by my tests in VSRA.

Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
---
 target-arm/translate.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
Christophe LYON - Jan. 31, 2011, 3:48 p.m.
On 25.01.2011 18:18, Christophe Lyon wrote:
> This patch fixes the errors reported by my tests in VSRA.
> 

ping?
Peter Maydell - Feb. 4, 2011, 11:44 a.m.
On 25 January 2011 17:18, Christophe Lyon <christophe.lyon@st.com> wrote:
> This patch fixes the errors reported by my tests in VSRA.
>
> Signed-off-by: Christophe Lyon <christophe.lyon@st.com>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Aurelien Jarno - Feb. 4, 2011, 7:49 p.m.
On Tue, Jan 25, 2011 at 06:18:08PM +0100, Christophe Lyon wrote:
> This patch fixes the errors reported by my tests in VSRA.
> 
> Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
> ---
>  target-arm/translate.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)

Thanks applied.

> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 7cb48c0..4cf2ecd 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -4697,7 +4697,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
>                          }
>                          if (op == 1 || op == 3) {
>                              /* Accumulate.  */
> -                            neon_load_reg64(cpu_V0, rd + pass);
> +                            neon_load_reg64(cpu_V1, rd + pass);
>                              tcg_gen_add_i64(cpu_V0, cpu_V0, cpu_V1);
>                          } else if (op == 4 || (op == 5 && u)) {
>                              /* Insert */
> @@ -4761,7 +4761,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
>                          if (op == 1 || op == 3) {
>                              /* Accumulate.  */
>                              tmp2 = neon_load_reg(rd, pass);
> -                            gen_neon_add(size, tmp2, tmp);
> +                            gen_neon_add(size, tmp, tmp2);
>                              dead_tmp(tmp2);
>                          } else if (op == 4 || (op == 5 && u)) {
>                              /* Insert */
> -- 
> 1.7.2.3
> 
> 
>

Patch

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 7cb48c0..4cf2ecd 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -4697,7 +4697,7 @@  static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
                         }
                         if (op == 1 || op == 3) {
                             /* Accumulate.  */
-                            neon_load_reg64(cpu_V0, rd + pass);
+                            neon_load_reg64(cpu_V1, rd + pass);
                             tcg_gen_add_i64(cpu_V0, cpu_V0, cpu_V1);
                         } else if (op == 4 || (op == 5 && u)) {
                             /* Insert */
@@ -4761,7 +4761,7 @@  static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
                         if (op == 1 || op == 3) {
                             /* Accumulate.  */
                             tmp2 = neon_load_reg(rd, pass);
-                            gen_neon_add(size, tmp2, tmp);
+                            gen_neon_add(size, tmp, tmp2);
                             dead_tmp(tmp2);
                         } else if (op == 4 || (op == 5 && u)) {
                             /* Insert */