From patchwork Tue Jan 25 14:32:09 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Clifton X-Patchwork-Id: 80362 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 1F0BFB7113 for ; Wed, 26 Jan 2011 01:31:20 +1100 (EST) Received: (qmail 16723 invoked by alias); 25 Jan 2011 14:31:13 -0000 Received: (qmail 16512 invoked by uid 22791); 25 Jan 2011 14:31:12 -0000 X-SWARE-Spam-Status: No, hits=-6.0 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_HI, SPF_HELO_PASS, TW_MV, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 25 Jan 2011 14:31:07 +0000 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id p0PEV5qR006812 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 25 Jan 2011 09:31:05 -0500 Received: from Gift.redhat.com (vpn1-6-77.ams2.redhat.com [10.36.6.77]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p0PEV2MG012308 for ; Tue, 25 Jan 2011 09:31:04 -0500 From: Nick Clifton To: gcc-patches@gcc.gnu.org Subject: RX: Fix ICEs in gcc testsuite Date: Tue, 25 Jan 2011 14:32:09 +0000 Message-ID: MIME-Version: 1.0 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi Guys, I am applying the patch below to fix several internal compiler errors reported when running the GCC testsuite for the RX target, and to clean up a few minor details. The changes are as follows: * Do not attempt to promote complex types to SImode when returning them from a function. * Remove the new addsi3_unspec pattern and just create the UNPSEC by hand. (Thanks to RTH for suggesting this). * Do not accept immediates in the subdi3 pattern as it may not be possible to split the result. * Remove non-existent builtins from the RX builtin test. Cheers Nick gcc/ChangeLog 2011-01-25 Nick Clifton * config/rx/rx.h (LIBCALL_VALUE): Do not promote complex types. * config/rx/rx.c (rx_function_value): Likewise. (rx_promote_function_mode): Likewise. (gen_safe_add): Place an outsized immediate value inside an UNSPEC in order to make it legitimate. * config/rx/rx.md (adddi3_internal): If the second operand is a MEM make sure that the first operand is the same as the result register. (addsi3_unspec): Delete. (subdi3): Do not accept immediate operands. (subdi3_internal): Likewise. gcc/testsuite/ChangeLog 2011-01-25 Nick Clifton * gcc.target/rx/builtins.c: Allow -fipa-cp-clone. (saturate_add): Delete. (exchange): Delete. (main): Do not run saturate_add. (set_interrupts): Delete. Index: gcc/config/rx/rx.h =================================================================== --- gcc/config/rx/rx.h (revision 169221) +++ gcc/config/rx/rx.h (working copy) @@ -251,6 +251,7 @@ #define LIBCALL_VALUE(MODE) \ gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \ + || COMPLEX_MODE_P (MODE) \ || GET_MODE_SIZE (MODE) >= 4) \ ? (MODE) \ : SImode), \ Index: gcc/config/rx/rx.md =================================================================== --- gcc/config/rx/rx.md (revision 169221) +++ gcc/config/rx/rx.md (working copy) @@ -961,8 +961,18 @@ if (rtx_equal_p (op0l, op1l)) ; + /* It is preferable that op0l == op1l... */ else if (rtx_equal_p (op0l, op2l)) x = op1l, op1l = op2l, op2l = x; + /* ... but it is only a requirement if op2l == MEM. */ + else if (MEM_P (op2l)) + { + /* Let's hope that we still have a scratch register free. */ + gcc_assert (op1h != scratch); + emit_move_insn (scratch, op2l); + op2l = scratch; + } + emit_insn (gen_addsi3_flags (op0l, op1l, op2l)); if (rtx_equal_p (op0h, op1h)) @@ -978,22 +988,6 @@ DONE; }) -;; A pattern to add an integer to a register, regardless of the -;; setting of the -mmax-constant-size command line switch. -;; See rx.c:gen_safe_add() for more details. -(define_insn "addsi3_unspec" - [(set (match_operand:SI 0 "register_operand" "=r,r") - (plus:SI (match_operand:SI 1 "register_operand" "%0,r") - (const:SI (unspec:SI [(match_operand 2 "const_int_operand" "n,n")] UNSPEC_CONST)))) - (clobber (reg:CC CC_REG))] - "" - "@ - add\t%2, %0 - add\t%2, %1, %0" - [(set_attr "timings" "11") - (set_attr "length" "6")] -) - (define_insn "andsi3" [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r,r,r") (and:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0,r,r,0") @@ -1483,9 +1477,9 @@ ) (define_expand "subdi3" - [(set (match_operand:DI 0 "register_operand" "") - (minus:DI (match_operand:DI 1 "register_operand" "") - (match_operand:DI 2 "rx_source_operand" "")))] + [(set (match_operand:DI 0 "register_operand") + (minus:DI (match_operand:DI 1 "register_operand") + (match_operand:DI 2 "rx_compare_operand")))] "" { rtx op0l, op0h, op1l, op1h, op2l, op2h; @@ -1504,7 +1498,7 @@ (define_insn_and_split "subdi3_internal" [(set (match_operand:SI 0 "register_operand" "=&r,&r") (minus:SI (match_operand:SI 2 "register_operand" " 0, r") - (match_operand:SI 3 "rx_source_operand" "rnQ, r"))) + (match_operand:SI 3 "rx_compare_operand" "rQ, r"))) (set (match_operand:SI 1 "register_operand" "= r, r") (minus:SI (minus:SI Index: gcc/config/rx/rx.c =================================================================== --- gcc/config/rx/rx.c (revision 169221) +++ gcc/config/rx/rx.c (working copy) @@ -874,7 +874,10 @@ /* RX ABI specifies that small integer types are promoted to int when returned by a function. */ - if (GET_MODE_SIZE (mode) > 0 && GET_MODE_SIZE (mode) < 4) + if (GET_MODE_SIZE (mode) > 0 + && GET_MODE_SIZE (mode) < 4 + && ! COMPLEX_MODE_P (mode) + ) return gen_rtx_REG (SImode, FUNC_RETURN_REGNUM); return gen_rtx_REG (mode, FUNC_RETURN_REGNUM); @@ -892,6 +895,7 @@ { if (for_return != 1 || GET_MODE_SIZE (mode) >= 4 + || COMPLEX_MODE_P (mode) || GET_MODE_SIZE (mode) < 1) return mode; @@ -1324,7 +1328,10 @@ insn = emit_insn (gen_addsi3 (dest, src, val)); else { - insn = emit_insn (gen_addsi3_unspec (dest, src, val)); + /* Wrap VAL in an UNSPEC so that rx_is_legitimate_constant + will not reject it. */ + val = gen_rtx_CONST (SImode, gen_rtx_UNSPEC (SImode, gen_rtvec (1, val), UNSPEC_CONST)); + insn = emit_insn (gen_addsi3 (dest, src, val)); if (is_frame_related) /* We have to provide our own frame related note here Index: gcc/testsuite/gcc.target/rx/builtins.c =================================================================== --- gcc/testsuite/gcc.target/rx/builtins.c (revision 169221) +++ gcc/testsuite/gcc.target/rx/builtins.c (working copy) @@ -1,12 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fno-ipa-cp-clone" } */ /* Verify that the RX specific builtin functions work. */ - -/* IPA CP cloning is disabled because the constant propagation - has no understanding of the saturation behaviour of the - __builtin_rx_sat function and so it will optimize away the - saturation addition test. */ #include #include @@ -25,20 +19,6 @@ return __builtin_rx_revw (arg); } -int -saturate_add (int arg1, int arg2) -{ - arg1 += arg2; - return __builtin_rx_sat (arg1); -} - -int -exchange (int arg1, int arg2) -{ - arg1 = __builtin_rx_xchg (arg2); - return arg1; -} - long multiply_and_accumulate (long arg1, long arg2, long arg3) { @@ -118,7 +98,6 @@ main (void) { CHECK_1ARG (half_word_swap, 0x12345678, 0x34127856); - CHECK_2ARG (saturate_add, 0x80000000, 0x80000000, 0x80000000); CHECK_3ARG (multiply_and_accumulate, 0x111, 0x222, 0x333, 0x70007); CHECK_1ARG (rxround, 0.5, 1); return 0; @@ -163,9 +142,3 @@ { __builtin_rx_rmpa (); } - -void -set_interrupts (void) -{ - __builtin_mvtipl (3); -}