@@ -65,7 +65,7 @@
ldr r0, =SMRDATA
ldr r1, _MTEXT_BASE
sub r0, r0, r1
- add r2, r0, #80
+ add r2, r0, #(SMRDATA1-SMRDATA)
pllloop:
/* the address */
ldr r1, [r0], #4
@@ -83,7 +83,7 @@
ldr r0, =SMRDATA1
ldr r1, _MTEXT_BASE
sub r0, r0, r1
- add r2, r0, #176
+ add r2, r0, #(SMRDATA2-SMRDATA1)
sdinit:
/* the address */
ldr r1, [r0], #4
@@ -108,6 +108,10 @@
.word CONFIG_SYS_EBI_CFGR_VAL
.word AT91_ASM_MC_SMC_CSR0
.word CONFIG_SYS_SMC_CSR0_VAL
+#ifdef CONFIG_SYS_SMC_CSR2_VAL
+ .word AT91_ASM_MC_SMC_CSR2
+ .word CONFIG_SYS_SMC_CSR2_VAL
+#endif
.word AT91_ASM_PMC_PLLAR
.word CONFIG_SYS_PLLAR_VAL
.word AT91_ASM_PMC_PLLBR
@@ -161,4 +165,5 @@
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
/* SMRDATA1 is 176 bytes long */
+SMRDATA2:
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
@@ -122,7 +122,7 @@
bl coloured_LED_init
bl red_LED_on
-#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
+#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_KACOM)
/*
* relocate exception table
*/
@@ -190,6 +190,14 @@
/*------------------------------------------------------------------------------*/
+/* ldr r0, =0x00000001
+ ldr r1, =0xfffffA00
+ str r0, [r1]
+ ldr r1, =0xfffffA10
+ str r0, [r1]
+ ldr r1, =0xfffffA34
+ str r0, [r1]*/
+
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
@@ -26,6 +26,7 @@
#define AT91_ASM_MC_EBI_CSA (AT91_MC_BASE + 0x60)
#define AT91_ASM_MC_EBI_CFG (AT91_MC_BASE + 0x64)
#define AT91_ASM_MC_SMC_CSR0 (AT91_MC_BASE + 0x70)
+#define AT91_ASM_MC_SMC_CSR2 (AT91_MC_BASE + 0x78)
#define AT91_ASM_MC_SDRAMC_MR (AT91_MC_BASE + 0x90)
#define AT91_ASM_MC_SDRAMC_TR (AT91_MC_BASE + 0x94)
#define AT91_ASM_MC_SDRAMC_CR (AT91_MC_BASE + 0x98)
@@ -50,6 +50,10 @@
#include <onenand_uboot.h>
#include <mmc.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/at91_pio.h>
+#include <asm/io.h>
+
#ifdef CONFIG_BITBANGMII
#include <miiphy.h>
#endif
@@ -236,6 +240,18 @@
void dram_init_banksize(void)
__attribute__((weak, alias("__dram_init_banksize")));
+
+int my_led_off()
+{
+ at91_pio_t *pio = (at91_pio_t *)AT91_PIO_BASE;
+
+ writel(0x00000001, &pio->piod.per);
+ writel(0x00000001, &pio->piod.oer);
+ writel(0x00000001, &pio->piod.codr);
+
+ return 0;
+}
+
init_fnc_t *init_sequence[] = {
#if defined(CONFIG_ARCH_CPU_INIT)
arch_cpu_init, /* basic arch cpu dependent setup */
@@ -284,8 +300,12 @@
gd->mon_len = _bss_end_ofs;
+ //my_led_off();
+
for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
+ //if (timer_init == *init_fnc_ptr) my_led_off();
if ((*init_fnc_ptr)() != 0) {
+ my_led_off();
hang ();
}
}
@@ -0,0 +1,81 @@
+/*
+ * (C) Copyright 2011
+ * Kathrein Sachsen GmbH <www.kathrein-sachsen.de>
+ * Maik Hänig <m.haenig@kathrein-sachsen.de>
+ *
+ * (C) Copyright 2009
+ * Kathrein Antennen Electronic <www.kathrein.de>
+ * Christian Eggers <christian.eggers@kathrein.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <asm/arch/hardware.h>
+//#include <asm/arch/at91_pio.h>
+//#include <asm/arch/at91_pmc.h>
+//#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+int board_init (void)
+{
+ //at91_pio_t *pio = (at91_pio_t *)AT91_PIO_BASE;
+
+ /*
+ * Correct IRDA resistor problem
+ * Set PA23_TXD in Output
+ */
+ //writel(AT91_PMX_AA_TXD2, &pio->pioa.oer);
+
+ /* Enable Ctrlc */
+ console_init_f ();
+
+ /* memory and cpu-speed are setup before relocation */
+ /* so we do _nothing_ here */
+
+ /* arch number of KACOM-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_KACOM;
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ return 0;
+}
+
+int dram_init (void)
+{
+ /* dram_init must store complete ramsize in gd->ram_size */
+ gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+#ifdef CONFIG_DRIVER_AT91EMAC
+int board_eth_init(bd_t *bis)
+{
+ return at91emac_register(bis, (u32) AT91_EMAC_BASE);
+}
+#endif
+
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2011
+# Maik Hänig, Kathrein Sachsen GmbH, m.haenig@kathrein-sachsen.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS-y += $(BOARD).o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
@@ -53,6 +53,7 @@
eb_cpux9k2 arm arm920t - BuS at91
cmc_pu2 arm arm920t - - at91rm9200
csb637 arm arm920t - - at91rm9200
+kacom arm arm920t kacom - at91 kacom
kb9202 arm arm920t - - at91rm9200
m501sk arm arm920t - - at91rm9200
mp2usb arm arm920t - - at91rm9200
@@ -0,0 +1,272 @@
+/*
+ * Copyright (C) 2011 Maik Hänig <m.haenig@kathrein-sachsen.de>
+ *
+ * based on previous work by
+ *
+ * Andreas Bießmann <biessmann.devel@googlemail.com>
+ * Ulf Samuelsson <ulf@atmel.com>
+ * Rick Bronson <rick@efn.org>
+ *
+ * Configuration settings for the AT91RM9200EK board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __KACOM_CONFIG_H
+#define __KACOM_CONFIG_H
+
+#include <asm/sizes.h>
+
+#define CONFIG_SYS_TEXT_BASE 0x23f00000
+
+/*
+ * AT91C_XTAL_CLOCK is the frequency of external xtal in hertz
+ * AT91C_MAIN_CLOCK is the frequency of PLLA output
+ * AT91C_MASTER_CLOCK is the peripherial clock
+ * CONFIG_SYS_HZ_CLOCK is the value for CCR in tc0 (divider 2 is implicitely
+ * set in arch/arm/cpu/arm920t/at91/timer.c)
+ * CONFIG_SYS_HZ is the tick rate for timer tc0
+ */
+#define AT91C_XTAL_CLOCK 18432000
+#define AT91C_MAIN_CLOCK ((AT91C_XTAL_CLOCK / 4) * 39)
+#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3 )
+#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
+#define CONFIG_SYS_HZ 1000
+
+/* CPU configuration */
+#define CONFIG_ARM920T
+#define USE_920T_MMU
+#define CONFIG_AT91RM9200
+#define CONFIG_KACOM
+#define CONFIG_CPUAT91
+#define CONFIG_AT91FAMILY
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/*
+ * Memory Configuration
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
+#define CONFIG_SYS_SDRAM_SIZE SZ_64M
+
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END \
+ (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - SZ_256K)
+
+/*
+ * LowLevel Init
+ */
+#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
+/* flash */
+#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
+#define CONFIG_SYS_SMC_CSR0_VAL 0x00003384 /* 16bit, 3 TDF, 4(5) WS (Intel Flash) */
+#define CONFIG_SYS_SMC_CSR2_VAL 0x00003384 /* 16bit, 3 TDF, 4(5) WS (Intel Flash) */
+
+/* clocks */
+#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
+#define CONFIG_SYS_PLLBR_VAL 0x1048be0e /* (18.432 / 14 * 73) /2 = 47.9714 */
+#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
+
+/* sdram */
+#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
+#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
+#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
+#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
+#define CONFIG_SYS_SDRC_CR_VAL 0x21912159 /* set up the SDRAM (colbits=9, rowbits=13, banks=4, cas=2, \
+ tWR=2(1CLK+7.5ns), tRC=4(60ns), tRP=2(20ns), \
+ tRCD=2(20ns), tRAS=3(44ns), tXSR=4(75ns)) */
+#define CONFIG_SYS_SDRAM CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */
+#define CONFIG_SYS_SDRAM1 (CONFIG_SYS_SDRAM_BASE+0x80)
+#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to SDRAM */
+#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
+#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
+#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
+#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
+#define CONFIG_SYS_SDRC_TR_VAL 0x000001D4 /* Write refresh rate (7.81us) */
+
+/*
+ * Hardware drivers
+ */
+
+/* define one of these to choose the DBGU, USART0 or USART1 as console */
+#define CONFIG_AT91RM9200_USART
+#define CONFIG_DBGU
+//#define CONFIG_USART0
+
+#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
+#define CONFIG_BAUDRATE 115200
+
+#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
+#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_BOOTD /* bootd */
+#define CONFIG_CMD_CONSOLE /* coninfo */
+#define CONFIG_CMD_DHCP /* DHCP Support */
+#define CONFIG_CMD_ECHO /* echo arguments */
+#define CONFIG_CMD_EDITENV /* editenv */
+#define CONFIG_CMD_ITEST /* Integer (and string) test */
+#define CONFIG_CMD_FAT /* FAT support */
+#define CONFIG_CMD_FLASH /* flinfo, erase, protect */
+#define CONFIG_CMD_IMLS /* List all found images */
+#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */
+#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
+#define CONFIG_CMD_RUN /* run command in env variable */
+#define CONFIG_CMD_SAVEENV /* saveenv */
+#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
+#define CONFIG_CMD_SOURCE /* "source" command support */
+#define CONFIG_CMD_USB /* USB Support */
+
+/* I2C settings */
+//#define CONFIG_HARD_I2C
+//#define CONFIG_SYS_I2C_SPEED 400000
+//#define CONFIG_SYS_I2C_SLAVE 0
+
+/*
+ * Network Driver Setting
+ */
+#define CONFIG_NET_MULTI
+#define CONFIG_DRIVER_AT91EMAC
+#define CONFIG_SYS_RX_ETH_BUFFER 16
+#define CONFIG_RMII
+#define CONFIG_MII
+
+//#define CONFIG_DRIVER_ETHER
+#define CONFIG_NET_RETRY_COUNT 20
+//#undef CONFIG_AT91C_USE_RMII
+
+/* Settings for CFI driver */
+#define PHYS_FLASH_SECT_SIZE 0x20000 /* 128kB sectors, required for env-size */
+#define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */
+#define CONFIG_SYS_FLASH_CFI 1 /* additional fields for CFI in struct flash_info_t */
+#define CONFIG_SYS_FLASH_BASE 0x10000000
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max # of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max # of sectors on one chip */
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, 0x30000000 }
+
+/*
+ * USB Config
+ */
+#define CONFIG_USB_ATMEL 1
+#define CONFIG_USB_OHCI_NEW 1
+//#define CONFIG_USB_KEYBOARD 1
+#define CONFIG_USB_STORAGE 1
+#define CONFIG_DOS_PARTITION 1
+#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
+#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
+
+/*#define LITTLEENDIAN
+#define CONFIG_USB_STORAGE 1
+#define CONFIG_DOS_PARTITION 1
+#define CONFIG_AT91C_PQFP_UHPBUG 1
+
+#define CONFIG_USB_OHCI_NEW 1
+#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
+#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
+#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
+*/
+
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 2*PHYS_FLASH_SECT_SIZE) /* 1st and 2nd sector for code, 3nd sector for env */
+#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
+#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* use the whole sector (waste of some RAM) */
+#define CONFIG_SYS_ENV_SIZE CONFIG_ENV_SECT_SIZE /* for start.S */
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + PHYS_FLASH_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
+
+/*
+ * Boot option
+ */
+#define CONFIG_BOOTDELAY 1
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* default load address */
+#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
+/* #define CONFIG_ENV_OVERWRITE 1 */
+
+/*
+ * Shell Settings
+ */
+#undef CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+
+#define CONFIG_SYS_PROMPT "KACOM> " /* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
+#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "loadusb=usb start;fatload usb 0 0x20000000 rfid/uImage;setenv uimage_size $(filesize);fatload usb 0 0x21000000 rfid/rootfs.sqsh;setenv rootfs_size $(filesize);fatload usb 0 0x22000000 rfid/cfgfs.jffs2;setenv cfgfs_size $(filesize)\0" \
+ "loadtftp=tftp 0x20000000 uImage;setenv uimage_size $(filesize);tftp 0x21000000 rootfs.sqsh;setenv rootfs_size $(filesize); tftp 0x22000000 cfgfs.jffs2;setenv cfgfs_size $(filesize)\0" \
+ "flash1=protect off 0x10060000 0x10ffffff;erase 0x10060000 0x10ffffff;cp.b 0x20000000 0x10060000 $(uimage_size);cp.b 0x21000000 0x10200000 $(rootfs_size);cp.b 0x22000000 0x10900000 $(cfgfs_size);cmp.b 0x20000000 0x10060000 $(uimage_size);cmp.b 0x21000000 0x10200000 $(rootfs_size);cmp.b 0x22000000 0x10900000 $(cfgfs_size);\0" \
+ "bootcmd1=setenv bootargs root=/dev/mtdblock5 rootfstype=squashfs ETHADDR=$(ethaddr) RUNNING=$(runningimage) CFGFS=mtdblock6;bootm 0x10060000\0" \
+ "flash2=protect off 0x30060000 0x30ffffff;erase 0x30060000 0x30ffffff;cp.b 0x20000000 0x30060000 $(uimage_size);cp.b 0x21000000 0x30200000 $(rootfs_size);cp.b 0x22000000 0x30900000 $(cfgfs_size);cmp.b 0x20000000 0x30060000 $(uimage_size);cmp.b 0x21000000 0x30200000 $(rootfs_size);cmp.b 0x22000000 0x30900000 $(cfgfs_size);\0" \
+ "bootcmd2=setenv bootargs root=/dev/mtdblock9 rootfstype=squashfs ETHADDR=$(ethaddr) RUNNING=$(runningimage) CFGFS=mtdblock10;bootm 0x30060000\0" \
+ "image=1\0" \
+ "bootcmd=setenv runningimage $(image);run bootcmd$(image)\0"
+
+
+#ifndef __ASSEMBLY__
+/*-----------------------------------------------------------------------
+ * Board specific extension for bd_info
+ *
+ * This structure is embedded in the global bd_info (bd_t) structure
+ * and can be used by the board specific code (eg board/...)
+ */
+
+struct bd_info_ext {
+ /* helper variable for board environment handling
+ *
+ * env_crc_valid == 0 => uninitialised
+ * env_crc_valid > 0 => environment crc in flash is valid
+ * env_crc_valid < 0 => environment crc in flash is invalid
+ */
+ int env_crc_valid;
+};
+#endif
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_SYS_ENV_SIZE + 256 * 1024)
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \
+ - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_STACKSIZE SZ_32K /* regular stack */
+#define CONFIG_STACKSIZE_IRQ SZ_4K /* Unsure if to big or to small*/
+#define CONFIG_STACKSIZE_FIQ SZ_4K /* Unsure if to big or to small*/
+
+#ifdef CONFIG_USE_IRQ
+#error CONFIG_USE_IRQ not supported
+#endif
+
+#endif
@@ -346,6 +346,7 @@
guruplug \
imx27lite \
jadecpu \
+ kacom \
lpd7a400 \
magnesium \
mv88f6281gtw_ge \