| Message ID | 1502862122-14771-2-git-send-email-bmeng.cn@gmail.com |
|---|---|
| State | Accepted |
| Commit | 3df39ef10704e82a61972fe2f71b6ff4466b7724 |
| Delegated to: | Bin Meng |
| Headers | show |
On 15 August 2017 at 23:41, Bin Meng <bmeng.cn@gmail.com> wrote: > Per the Intel 64 and IA-32 Architecture Software Developer's Manual, > add the reference clock for Intel Atom Processors based on the Airmont > Microarchitecture (Braswell). > > This keeps in sync with Linux kernel commit: > 6fcb41c: x86/tsc_msr: Add Airmont reference clock values > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > --- > > drivers/timer/tsc_timer.c | 17 ++++++++++------- > 1 file changed, 10 insertions(+), 7 deletions(-) Reviewed-by: Simon Glass <sjg@chromium.org>
On Sat, Aug 26, 2017 at 9:38 PM, Simon Glass <sjg@chromium.org> wrote: > On 15 August 2017 at 23:41, Bin Meng <bmeng.cn@gmail.com> wrote: >> Per the Intel 64 and IA-32 Architecture Software Developer's Manual, >> add the reference clock for Intel Atom Processors based on the Airmont >> Microarchitecture (Braswell). >> >> This keeps in sync with Linux kernel commit: >> 6fcb41c: x86/tsc_msr: Add Airmont reference clock values >> >> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> >> --- >> >> drivers/timer/tsc_timer.c | 17 ++++++++++------- >> 1 file changed, 10 insertions(+), 7 deletions(-) > > Reviewed-by: Simon Glass <sjg@chromium.org> applied to u-boot-x86/next, thanks!
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index 4d1fc9c..77040af 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -18,7 +18,7 @@ #include <asm/msr.h> #include <asm/u-boot-x86.h> -#define MAX_NUM_FREQS 8 +#define MAX_NUM_FREQS 9 DECLARE_GLOBAL_DATA_PTR; @@ -40,17 +40,20 @@ struct freq_desc { static struct freq_desc freq_desc_tables[] = { /* PNW */ - { 6, 0x27, 0, { 0, 0, 0, 0, 0, 99840, 0, 83200 } }, + { 6, 0x27, 0, { 0, 0, 0, 0, 0, 99840, 0, 83200, 0 } }, /* CLV+ */ - { 6, 0x35, 0, { 0, 133200, 0, 0, 0, 99840, 0, 83200 } }, + { 6, 0x35, 0, { 0, 133200, 0, 0, 0, 99840, 0, 83200, 0 } }, /* TNG - Intel Atom processor Z3400 series */ - { 6, 0x4a, 1, { 0, 100000, 133300, 0, 0, 0, 0, 0 } }, + { 6, 0x4a, 1, { 0, 100000, 133300, 0, 0, 0, 0, 0, 0 } }, /* VLV2 - Intel Atom processor E3000, Z3600, Z3700 series */ - { 6, 0x37, 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } }, + { 6, 0x37, 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0, 0 } }, /* ANN - Intel Atom processor Z3500 series */ - { 6, 0x5a, 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 } }, + { 6, 0x5a, 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0, 0 } }, + /* AMT - Intel Atom processor X7-Z8000 and X5-Z8000 series */ + { 6, 0x4c, 1, { 83300, 100000, 133300, 116700, + 80000, 93300, 90000, 88900, 87500 } }, /* Ivybridge */ - { 6, 0x3a, 2, { 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 6, 0x3a, 2, { 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, }; static int match_cpu(u8 family, u8 model)
Per the Intel 64 and IA-32 Architecture Software Developer's Manual, add the reference clock for Intel Atom Processors based on the Airmont Microarchitecture (Braswell). This keeps in sync with Linux kernel commit: 6fcb41c: x86/tsc_msr: Add Airmont reference clock values Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- drivers/timer/tsc_timer.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-)