From patchwork Mon Jan 24 11:56:56 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabien Chouteau X-Patchwork-Id: 80145 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8A6ADB711C for ; Mon, 24 Jan 2011 23:10:10 +1100 (EST) Received: from localhost ([127.0.0.1]:45983 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PhLFG-0005m5-BE for incoming@patchwork.ozlabs.org; Mon, 24 Jan 2011 07:10:06 -0500 Received: from [140.186.70.92] (port=48617 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PhL2p-0002HZ-TH for qemu-devel@nongnu.org; Mon, 24 Jan 2011 06:57:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PhL2n-0007ld-3g for qemu-devel@nongnu.org; Mon, 24 Jan 2011 06:57:14 -0500 Received: from mel.act-europe.fr ([194.98.77.210]:33475) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PhL2m-0007l9-Hv for qemu-devel@nongnu.org; Mon, 24 Jan 2011 06:57:13 -0500 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id 5FA4FCB026E; Mon, 24 Jan 2011 12:57:09 +0100 (CET) X-Quarantine-ID: X-Virus-Scanned: amavisd-new at eu.adacore.com X-Amavis-Alert: BAD HEADER, Duplicate header field: "In-Reply-To" Received: from mel.act-europe.fr ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HAeoE4zrv-oS; Mon, 24 Jan 2011 12:57:09 +0100 (CET) Received: from PomPomGalli.act-europe.fr (pompomgalli.act-europe.fr [10.10.1.88]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mel.act-europe.fr (Postfix) with ESMTP id 421F1CB016C; Mon, 24 Jan 2011 12:57:09 +0100 (CET) From: Fabien Chouteau To: qemu-devel@nongnu.org Date: Mon, 24 Jan 2011 12:56:56 +0100 Message-Id: X-Mailer: git-send-email 1.7.1 In-Reply-To: <3b9c6f23d874e3b9967a05430492efe12db2b909.1295864365.git.chouteau@adacore.com> References: <113fdff64a71607aea24d53ffc9e5f31c27a44f4.1295864365.git.chouteau@adacore.com> <451285a1f82d3427b12481fd86b6b783f1e770bd.1295864365.git.chouteau@adacore.com> <3b9c6f23d874e3b9967a05430492efe12db2b909.1295864365.git.chouteau@adacore.com> In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: Fabien Chouteau Subject: [Qemu-devel] [PATCH v4 5/5] SPARC: Add asr17 register support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This register is activated by CPU_FEATURE_ASR17 in the feature field. Signed-off-by: Fabien Chouteau --- target-sparc/cpu.h | 1 + target-sparc/helper.c | 3 ++- target-sparc/translate.c | 11 +++++++++++ 3 files changed, 14 insertions(+), 1 deletions(-) diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 5c50d9e..6f5990b 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -267,6 +267,7 @@ typedef struct sparc_def_t { #define CPU_FEATURE_CMT (1 << 12) #define CPU_FEATURE_GL (1 << 13) #define CPU_FEATURE_TA0_SHUTDOWN (1 << 14) /* Shutdown on "ta 0x0" */ +#define CPU_FEATURE_ASR17 (1 << 15) #ifndef TARGET_SPARC64 #define CPU_DEFAULT_FEATURES (CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | \ CPU_FEATURE_MUL | CPU_FEATURE_DIV | \ diff --git a/target-sparc/helper.c b/target-sparc/helper.c index ec6ac27..2f3d1e6 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -1288,7 +1288,8 @@ static const sparc_def_t sparc_defs[] = { .mmu_sfsr_mask = 0xffffffff, .mmu_trcr_mask = 0xffffffff, .nwindows = 8, - .features = CPU_DEFAULT_FEATURES | CPU_FEATURE_TA0_SHUTDOWN, + .features = CPU_DEFAULT_FEATURES | CPU_FEATURE_TA0_SHUTDOWN | + CPU_FEATURE_ASR17, }, #endif }; diff --git a/target-sparc/translate.c b/target-sparc/translate.c index dff0f19..e26462e 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -2067,6 +2067,17 @@ static void disas_sparc_insn(DisasContext * dc) case 0x10 ... 0x1f: /* implementation-dependent in the SPARCv8 manual, rdy on the microSPARC II */ + /* Read Asr17 */ + if (rs1 == 0x11 && dc->def->features & CPU_FEATURE_ASR17) { + TCGv r_const; + + /* Read Asr17 for a Leon3 monoprocessor */ + r_const = tcg_const_tl((1 << 8) + | (dc->def->nwindows - 1)); + gen_movl_TN_reg(rd, r_const); + tcg_temp_free(r_const); + break; + } #endif gen_movl_TN_reg(rd, cpu_y); break;