[v6,2/3] pci: add QEMU-specific PCI capability structure

Submitted by Alexander Bezzubikov on Aug. 13, 2017, 4:03 p.m.

Details

Message ID 1502640203-15577-3-git-send-email-zuban32s@gmail.com
State New
Headers show

Commit Message

Alexander Bezzubikov Aug. 13, 2017, 4:03 p.m.
On PCI init PCI bridge devices may need some
extra info about bus number to reserve, IO, memory and
prefetchable memory limits. QEMU can provide this
with special vendor-specific PCI capability.

This capability is intended to be used only
for Red Hat PCI bridges, i.e. QEMU cooperation.

Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
---
 src/fw/dev-pci.h | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 src/fw/dev-pci.h

Comments

Marcel Apfelbaum Aug. 16, 2017, 9:54 a.m.
On 13/08/2017 19:03, Aleksandr Bezzubikov wrote:
> On PCI init PCI bridge devices may need some
> extra info about bus number to reserve, IO, memory and
> prefetchable memory limits. QEMU can provide this
> with special vendor-specific PCI capability.
> 
> This capability is intended to be used only
> for Red Hat PCI bridges, i.e. QEMU cooperation.
> 


Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>

Thanks,
Marcel

> Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
> ---
>   src/fw/dev-pci.h | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 53 insertions(+)
>   create mode 100644 src/fw/dev-pci.h
> 
> diff --git a/src/fw/dev-pci.h b/src/fw/dev-pci.h
> new file mode 100644
> index 0000000..0dc5556
> --- /dev/null
> +++ b/src/fw/dev-pci.h
> @@ -0,0 +1,53 @@
> +#ifndef _PCI_CAP_H
> +#define _PCI_CAP_H
> +
> +#include "types.h"
> +
> +/*
> + *
> + * QEMU-specific vendor(Red Hat)-specific capability.
> + * It's intended to provide some hints for firmware to init PCI devices.
> + *
> + * Its structure is shown below:
> + *
> + * Header:
> + *
> + * u8 id;       Standard PCI Capability Header field
> + * u8 next;     Standard PCI Capability Header field
> + * u8 len;      Standard PCI Capability Header field
> + * u8 type;     Red Hat vendor-specific capability type
> + * Data:
> + *
> + * u32 bus_res;     minimum bus number to reserve;
> + *                  this is necessary for PCI Express Root Ports
> + *                  to support PCI bridges hotplug
> + * u64 io;          IO space to reserve
> + * u32 mem;         non-prefetchable memory to reserve
> + *
> + * At most of the following two fields may be set to a value
> + * different from 0xFF...F:
> + * u32 prefetchable_mem_32;     prefetchable memory to reserve (32-bit MMIO)
> + * u64 prefetchable_mem_64;     prefetchable memory to reserve (64-bit MMIO)
> + *
> + * If any field value in Data section is 0xFF...F,
> + * it means that such kind of reservation is not needed and must be ignored.
> + *
> +*/
> +
> +/* Offset of vendor-specific capability type field */
> +#define PCI_CAP_REDHAT_TYPE_OFFSET  3
> +
> +/* List of valid Red Hat vendor-specific capability types */
> +#define REDHAT_CAP_RESOURCE_RESERVE 1
> +
> +
> +/* Offsets of RESOURCE_RESERVE capability fields */
> +#define RES_RESERVE_BUS_RES        4
> +#define RES_RESERVE_IO             8
> +#define RES_RESERVE_MEM            16
> +#define RES_RESERVE_PREF_MEM_32    20
> +#define RES_RESERVE_PREF_MEM_64    24
> +#define RES_RESERVE_CAP_SIZE       32
> +
> +#endif /* _PCI_CAP_H */
> +
>

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diff --git a/src/fw/dev-pci.h b/src/fw/dev-pci.h
new file mode 100644
index 0000000..0dc5556
--- /dev/null
+++ b/src/fw/dev-pci.h
@@ -0,0 +1,53 @@ 
+#ifndef _PCI_CAP_H
+#define _PCI_CAP_H
+
+#include "types.h"
+
+/*
+ *
+ * QEMU-specific vendor(Red Hat)-specific capability.
+ * It's intended to provide some hints for firmware to init PCI devices.
+ *
+ * Its structure is shown below:
+ *
+ * Header:
+ *
+ * u8 id;       Standard PCI Capability Header field
+ * u8 next;     Standard PCI Capability Header field
+ * u8 len;      Standard PCI Capability Header field
+ * u8 type;     Red Hat vendor-specific capability type
+ * Data:
+ *
+ * u32 bus_res;     minimum bus number to reserve;
+ *                  this is necessary for PCI Express Root Ports
+ *                  to support PCI bridges hotplug
+ * u64 io;          IO space to reserve
+ * u32 mem;         non-prefetchable memory to reserve
+ *
+ * At most of the following two fields may be set to a value
+ * different from 0xFF...F:
+ * u32 prefetchable_mem_32;     prefetchable memory to reserve (32-bit MMIO)
+ * u64 prefetchable_mem_64;     prefetchable memory to reserve (64-bit MMIO)
+ *
+ * If any field value in Data section is 0xFF...F,
+ * it means that such kind of reservation is not needed and must be ignored.
+ *
+*/
+
+/* Offset of vendor-specific capability type field */
+#define PCI_CAP_REDHAT_TYPE_OFFSET  3
+
+/* List of valid Red Hat vendor-specific capability types */
+#define REDHAT_CAP_RESOURCE_RESERVE 1
+
+
+/* Offsets of RESOURCE_RESERVE capability fields */
+#define RES_RESERVE_BUS_RES        4
+#define RES_RESERVE_IO             8
+#define RES_RESERVE_MEM            16
+#define RES_RESERVE_PREF_MEM_32    20
+#define RES_RESERVE_PREF_MEM_64    24
+#define RES_RESERVE_CAP_SIZE       32
+
+#endif /* _PCI_CAP_H */
+