From patchwork Fri Aug 11 16:56:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinan Kaya X-Patchwork-Id: 800659 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="LCkoNgq2"; dkim=pass (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="LCkoNgq2"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xTWPW4VDdz9s7F for ; Sat, 12 Aug 2017 02:56:47 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753158AbdHKQ4p (ORCPT ); Fri, 11 Aug 2017 12:56:45 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:40942 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752959AbdHKQ4o (ORCPT ); Fri, 11 Aug 2017 12:56:44 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id DD9CD600D0; Fri, 11 Aug 2017 16:56:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1502470603; bh=LYdcNIt6oS7xA/4jdULWzgLDZ/ADKP0huD52jXACK0A=; h=From:To:Cc:Subject:Date:From; b=LCkoNgq2J3JjeiUsp6o89AcYurkgC5Wsws5MO3Oippg85CU8R4Aeui/pk5W8HwzUN sUyPMRAe1ajTM7vhjIziAJ5jlX244augWdt5oCbSiRczd7YnXHJJCexyAOWAof106l y37UHFnqjXoaTofU2bWuao4pxpAgz4fMRiVUyAW8= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 67909600D0; Fri, 11 Aug 2017 16:56:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1502470603; bh=LYdcNIt6oS7xA/4jdULWzgLDZ/ADKP0huD52jXACK0A=; h=From:To:Cc:Subject:Date:From; b=LCkoNgq2J3JjeiUsp6o89AcYurkgC5Wsws5MO3Oippg85CU8R4Aeui/pk5W8HwzUN sUyPMRAe1ajTM7vhjIziAJ5jlX244augWdt5oCbSiRczd7YnXHJJCexyAOWAof106l y37UHFnqjXoaTofU2bWuao4pxpAgz4fMRiVUyAW8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 67909600D0 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: linux-pci@vger.kernel.org, timur@codeaurora.org, alex.williamson@redhat.com Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sinan Kaya , Bjorn Helgaas , linux-kernel@vger.kernel.org Subject: [PATCH V10 1/3] PCI: introduce pci_bus_wait_crs() function Date: Fri, 11 Aug 2017 12:56:34 -0400 Message-Id: <1502470596-4112-1-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Kernel is hiding Configuration Request Retry Status (CRS) inside pci_bus_read_dev_vendor_id() function. We are looking to add support for Function Level Reset (FLR) where vendor id read returns ~0. Move CRS handling into its own function so that it can be called from other places as well. Signed-off-by: Sinan Kaya --- drivers/pci/pci.h | 2 ++ drivers/pci/probe.c | 44 ++++++++++++++++++++++++++++++-------------- 2 files changed, 32 insertions(+), 14 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 22e0617..1bbe851 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -235,6 +235,8 @@ enum pci_bar_type { pci_bar_mem64, /* A 64-bit memory BAR */ }; +bool pci_bus_wait_crs(struct pci_bus *bus, int devfn, u32 *l, + int crs_timeout); bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, int crs_timeout); int pci_setup_device(struct pci_dev *dev); diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index c31310d..b1cb7bd 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1824,29 +1824,17 @@ struct pci_dev *pci_alloc_dev(struct pci_bus *bus) } EXPORT_SYMBOL(pci_alloc_dev); -bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *l, - int crs_timeout) +bool pci_bus_wait_crs(struct pci_bus *bus, int devfn, u32 *l, int crs_timeout) { int delay = 1; - if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, l)) - return false; - - /* some broken boards return 0 or ~0 if a slot is empty: */ - if (*l == 0xffffffff || *l == 0x00000000 || - *l == 0x0000ffff || *l == 0xffff0000) - return false; - /* * Configuration Request Retry Status. Some root ports return the * actual device ID instead of the synthetic ID (0xFFFF) required * by the PCIe spec. Ignore the device ID and only check for * (vendor id == 1). */ - while ((*l & 0xffff) == 0x0001) { - if (!crs_timeout) - return false; - + do { msleep(delay); delay *= 2; if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, l)) @@ -1858,6 +1846,34 @@ bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *l, PCI_FUNC(devfn)); return false; } + } while ((*l & 0xffff) == 0x0001); + + return true; +} +EXPORT_SYMBOL(pci_bus_wait_crs); + +bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *l, + int crs_timeout) +{ + if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, l)) + return false; + + /* some broken boards return 0 or ~0 if a slot is empty: */ + if (*l == 0xffffffff || *l == 0x00000000 || + *l == 0x0000ffff || *l == 0xffff0000) + return false; + + /* + * Configuration Request Retry Status. Some root ports return the + * actual device ID instead of the synthetic ID (0xFFFF) required + * by the PCIe spec. Ignore the device ID and only check for + * (vendor id == 1). + */ + if ((*l & 0xffff) == 0x0001) { + if (!crs_timeout) + return false; + + return pci_bus_wait_crs(bus, devfn, l, crs_timeout); } return true;