| Message ID | 1502451575-15712-19-git-send-email-absahu@codeaurora.org |
|---|---|
| State | Superseded, archived |
| Headers | show |
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt index d93b952..73d336be 100644 --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt @@ -6,6 +6,8 @@ Required properties: SoC and it uses ADM DMA * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in IPQ4019 SoC and it uses BAM DMA + * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in + IPQ8074 SoC and it uses BAM DMA - reg: MMIO address range - clocks: must contain core clock and always on clock
Qualcom IPQ8074 SoC uses QPIC NAND controller version 1.5.0 which uses BAM DMA Engine. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> --- Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 2 ++ 1 file changed, 2 insertions(+)