From patchwork Wed Aug 9 20:12:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 799922 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xSMxC1Pgsz9s81 for ; Thu, 10 Aug 2017 06:16:47 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id D4D0BC21DD1; Wed, 9 Aug 2017 20:15:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E7C87C21DF9; Wed, 9 Aug 2017 20:14:08 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0B874C21C8F; Wed, 9 Aug 2017 20:13:56 +0000 (UTC) Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lists.denx.de (Postfix) with ESMTPS id BAA7AC21DE4 for ; Wed, 9 Aug 2017 20:13:50 +0000 (UTC) Received: from localhost.localdomain.ziswiler.net ([89.217.76.191]) by mrelay.perfora.net (mreueus001 [74.208.5.2]) with ESMTPA (Nemesis) id 0MbyqG-1dxcAC1DTK-00JLzr; Wed, 09 Aug 2017 22:13:03 +0200 From: Marcel Ziswiler To: u-boot@lists.denx.de Date: Wed, 9 Aug 2017 22:12:38 +0200 Message-Id: <20170809201242.16355-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170809201242.16355-1-marcel@ziswiler.com> References: <20170809201242.16355-1-marcel@ziswiler.com> X-Provags-ID: V03:K0:zfVzkH2Hac7ZutEPdAHcSUj9wgQAOEbXDLiAgvaod1GSmbMQbgv 4NHf2rvVOWrU8WpBbsPgk4iCuV/Jm2KKQhVvT7C1S24BB2AK/vPN3q2L0eIvx9DRZKAc2ED QL6JMimMAgCKuoplJlIFQuKoG4djYgkoq6YbVet0xT6IEcZb/5YpwX/DEC+SaHfGGaivCAV nDT0lXX2z1SPiW7tjSMdA== X-UI-Out-Filterresults: notjunk:1; V01:K0:/rQ7h1DfNcw=:QSmGipXzTFrdamuMqq803D 2MIWhqw9hKUZ/10yG/I8dXOcYZU5o7QQAaCxPAxa8bzq1BJIzWD9iaa758Kjohzmf9JeiEjIg isAmg2YN5iz7BCY22nulaYgIaZnnmI+qP7PfhMcnY4N8X0hYcxODghr2GjVx8+EVKwxTGiYRB GTcldU56HImIf4LIVVkhtUjMgyoVLNRDiEkyrr0wAa+pYdjmKcHTunfe91VwIlwec6lc3u0Vt 8CzL8bIeWykBYpz4jhUDiqTh0+B9srGrmsdmLtPUVrkjNh2ty7NlNTkKc8wA4dz9JpRY0yBZb eET1bbjsz3+Kewj9Fv1JrlGYIzwlSd15h7NxhpFDhIsdwZ0ADdSF+GkqHSQd/6JAjs5KuGLDN A9RoH/0u2g/yQC+nYhn24a19Goplmcw7E0S/jCiFQ1dvLiAfqq5eu8hLDEyjWnmAEXiQJVIqM RKLijU2FTUxrefBnoeHPRlo/kcq58KsBMqruNzGbv2IIUBYpR6JaiJucETRtl7JU0weuGZAft JygZYVpCQxgreGqriEbN7932J1XMBY7F5clReUCl+eZ9O578Tb63cd4vIZi9iV7Dx3prZTk8d PCaN3ey9H9y4yN/Hyf2N/eu4ZahexCnKiiVOSLj3ROy9H6hC+yWnp7mZKmi9m0isxripeGI6V wuIXN7lE2n3pZ4ewST3ZUbipxbYl5R6kyeQoa2LAu1Q2zkWGqdEyRbEPPr+N8VOYAYu8V3O2m t2Usce7sNpKN5PXW59He6BjiYEVUY7/bTXYjpg== Cc: Albert Aribaud , Stephen Warren , Marcel Ziswiler , Tom Warren Subject: [U-Boot] [PATCH v4 2/6] apalis-tk1: add missing as3722 gpio0 configuration X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Marcel Ziswiler As the AS3722 GPIO0 is also a not connected on our Apalis TK1 module explicitly configure it to high-impedance as well. Signed-off-by: Marcel Ziswiler Reviewed-by: Simon Glass --- Changes in v4: None Changes in v3: None Changes in v2: - Add Simon's reviewed-by. arch/arm/dts/tegra124-apalis.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts index 2fc0384..fe08d3e 100644 --- a/arch/arm/dts/tegra124-apalis.dts +++ b/arch/arm/dts/tegra124-apalis.dts @@ -1683,9 +1683,9 @@ bias-pull-up; }; - gpio1_3_4_5_6 { - pins = "gpio1", "gpio3", "gpio4", - "gpio5", "gpio6"; + gpio0_1_3_4_5_6 { + pins = "gpio0", "gpio1", "gpio3", + "gpio4", "gpio5", "gpio6"; bias-high-impedance; }; };