| Message ID | 1502281187-24068-6-git-send-email-yoshihiro.shimoda.uh@renesas.com |
|---|---|
| State | New |
| Headers | show |
Hi Shimoda-san, Kihara-san, On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> But before I apply this, please see my question below... > --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c > +static const char * const avb0_groups[] = { > + "avb0_td", > + "avb0_rd", > + "avb0_tx_ctl", > + "avb0_rx_ctl", > + "avb0_txc", > + "avb0_rxc", > + "avb0_txcrefclk", > + "avb0_link", > + "avb0_magic", > + "avb0_phy_int", > + "avb0_mdc", > + "avb0_mdio", > + "avb0_avtp_pps_a", > + "avb0_avtp_match_a", > + "avb0_avtp_capture_a", > + "avb0_avtp_pps_b", > + "avb0_avtp_match_b", > + "avb0_avtp_capture_b", > +}; Is there any specific reason this uses a different split than the EtherAVB groups in pinctrl drivers for other SoCs? Note that I do understand that the different prefix ("avb0" vs. "avb") was used to match the R-Car D3 datasheet, which is thus OK. Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Geert-san, Sorry, I also missed this email... > -----Original Message----- > From: Geert Uytterhoeven > Sent: Wednesday, August 16, 2017 8:06 PM > > Hi Shimoda-san, Kihara-san, > > On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda > <yoshihiro.shimoda.uh@renesas.com> wrote: > > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > But before I apply this, please see my question below... > > > --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c > > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c > > > +static const char * const avb0_groups[] = { > > + "avb0_td", > > + "avb0_rd", > > + "avb0_tx_ctl", > > + "avb0_rx_ctl", > > + "avb0_txc", > > + "avb0_rxc", > > + "avb0_txcrefclk", > > + "avb0_link", > > + "avb0_magic", > > + "avb0_phy_int", > > + "avb0_mdc", > > + "avb0_mdio", > > + "avb0_avtp_pps_a", > > + "avb0_avtp_match_a", > > + "avb0_avtp_capture_a", > > + "avb0_avtp_pps_b", > > + "avb0_avtp_match_b", > > + "avb0_avtp_capture_b", > > +}; > > Is there any specific reason this uses a different split than the > EtherAVB groups > in pinctrl drivers for other SoCs? I will check this tomorrow (or later...). Best regards, Yoshihiro Shimoda > Note that I do understand that the different prefix ("avb0" vs. "avb") > was used to > match the R-Car D3 datasheet, which is thus OK. > > Thanks! > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
SGkgR2VlcnQtc2FuLA0KDQo+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+IEZyb206IFlv c2hpaGlybyBTaGltb2RhDQo+IFNlbnQ6IFdlZG5lc2RheSwgQXVndXN0IDMwLCAyMDE3IDEwOjE0 IFBNDQo+IA0KPiBIaSBHZWVydC1zYW4sDQo+IA0KPiBTb3JyeSwgSSBhbHNvIG1pc3NlZCB0aGlz IGVtYWlsLi4uDQo+IA0KPiA+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+ID4gRnJvbTog R2VlcnQgVXl0dGVyaG9ldmVuDQo+ID4gU2VudDogV2VkbmVzZGF5LCBBdWd1c3QgMTYsIDIwMTcg ODowNiBQTQ0KPiA+DQo+ID4gSGkgU2hpbW9kYS1zYW4sIEtpaGFyYS1zYW4sDQo+ID4NCj4gPiBP biBXZWQsIEF1ZyA5LCAyMDE3IGF0IDI6MTkgUE0sIFlvc2hpaGlybyBTaGltb2RhDQo+ID4gPHlv c2hpaGlyby5zaGltb2RhLnVoQHJlbmVzYXMuY29tPiB3cm90ZToNCj4gPiA+IEZyb206IFRha2Vz aGkgS2loYXJhIDx0YWtlc2hpLmtpaGFyYS5kZkByZW5lc2FzLmNvbT4NCj4gPiA+DQo+ID4gPiBT aWduZWQtb2ZmLWJ5OiBUYWtlc2hpIEtpaGFyYSA8dGFrZXNoaS5raWhhcmEuZGZAcmVuZXNhcy5j b20+DQo+ID4gPiBTaWduZWQtb2ZmLWJ5OiBZb3NoaWhpcm8gU2hpbW9kYSA8eW9zaGloaXJvLnNo aW1vZGEudWhAcmVuZXNhcy5jb20+DQo+ID4NCj4gPiBSZXZpZXdlZC1ieTogR2VlcnQgVXl0dGVy aG9ldmVuIDxnZWVydCtyZW5lc2FzQGdsaWRlci5iZT4NCj4gPg0KPiA+IEJ1dCBiZWZvcmUgSSBh cHBseSB0aGlzLCBwbGVhc2Ugc2VlIG15IHF1ZXN0aW9uIGJlbG93Li4uDQo+ID4NCj4gPiA+IC0t LSBhL2RyaXZlcnMvcGluY3RybC9zaC1wZmMvcGZjLXI4YTc3OTk1LmMNCj4gPiA+ICsrKyBiL2Ry aXZlcnMvcGluY3RybC9zaC1wZmMvcGZjLXI4YTc3OTk1LmMNCj4gPg0KPiA+ID4gK3N0YXRpYyBj b25zdCBjaGFyICogY29uc3QgYXZiMF9ncm91cHNbXSA9IHsNCj4gPiA+ICsgICAgICAgImF2YjBf dGQiLA0KPiA+ID4gKyAgICAgICAiYXZiMF9yZCIsDQo+ID4gPiArICAgICAgICJhdmIwX3R4X2N0 bCIsDQo+ID4gPiArICAgICAgICJhdmIwX3J4X2N0bCIsDQo+ID4gPiArICAgICAgICJhdmIwX3R4 YyIsDQo+ID4gPiArICAgICAgICJhdmIwX3J4YyIsDQo+ID4gPiArICAgICAgICJhdmIwX3R4Y3Jl ZmNsayIsDQo+ID4gPiArICAgICAgICJhdmIwX2xpbmsiLA0KPiA+ID4gKyAgICAgICAiYXZiMF9t YWdpYyIsDQo+ID4gPiArICAgICAgICJhdmIwX3BoeV9pbnQiLA0KPiA+ID4gKyAgICAgICAiYXZi MF9tZGMiLA0KPiA+ID4gKyAgICAgICAiYXZiMF9tZGlvIiwNCj4gPiA+ICsgICAgICAgImF2YjBf YXZ0cF9wcHNfYSIsDQo+ID4gPiArICAgICAgICJhdmIwX2F2dHBfbWF0Y2hfYSIsDQo+ID4gPiAr ICAgICAgICJhdmIwX2F2dHBfY2FwdHVyZV9hIiwNCj4gPiA+ICsgICAgICAgImF2YjBfYXZ0cF9w cHNfYiIsDQo+ID4gPiArICAgICAgICJhdmIwX2F2dHBfbWF0Y2hfYiIsDQo+ID4gPiArICAgICAg ICJhdmIwX2F2dHBfY2FwdHVyZV9iIiwNCj4gPiA+ICt9Ow0KPiA+DQo+ID4gSXMgdGhlcmUgYW55 IHNwZWNpZmljIHJlYXNvbiB0aGlzIHVzZXMgYSBkaWZmZXJlbnQgc3BsaXQgdGhhbiB0aGUNCj4g PiBFdGhlckFWQiBncm91cHMNCj4gPiBpbiBwaW5jdHJsIGRyaXZlcnMgZm9yIG90aGVyIFNvQ3M/ DQo+IA0KPiBJIHdpbGwgY2hlY2sgdGhpcyB0b21vcnJvdyAob3IgbGF0ZXIuLi4pLg0KDQpJIGFz a2VkIEtpaGFyYS1zYW4gYWJvdXQgdGhpcyBhbmQgaGUgZG9lc24ndCBrbm93IG90aGVyIFNvQyAo cjhhNzc5NSkgaGFzIG1paSBncm91cC4NClNvLCBJIHdpbGwgbW9kaWZ5IHRoZSBwYXRjaCBsaWtl IHI4YTc3OTUncyBncm91cC4NCg0KQnV0Li4uDQoNCj4gPiBOb3RlIHRoYXQgSSBkbyB1bmRlcnN0 YW5kIHRoYXQgdGhlIGRpZmZlcmVudCBwcmVmaXggKCJhdmIwIiB2cy4gImF2YiIpDQo+ID4gd2Fz IHVzZWQgdG8NCj4gPiBtYXRjaCB0aGUgUi1DYXIgRDMgZGF0YXNoZWV0LCB3aGljaCBpcyB0aHVz IE9LLg0KDQpJIGNoZWNrZWQgdGhpcyBvbiB0aGUgZGF0YXNoZWV0LCBidXQgaXQgc2VlbXMgZXJy b3IgaW4gaXQuDQpQRkMgc2VjdGlvbiBuYW1lcyAiQVZCMCIsIGJ1dCBFdGhlcm5ldCBBVkIgc2Vj dGlvbiBuYW1lcyAiQVZCIi4NClNvLCBJJ20gYXNraW5nIGh3IHRlYW0gYWJvdXQgdGhpcy4gQWZ0 ZXIgSSBnb3QgcmVwbHkgZnJvbSB0aGVtLA0KSSB3aWxsIHNlbmQgdjIgcGF0Y2guDQoNCkJlc3Qg cmVnYXJkcywNCllvc2hpaGlybyBTaGltb2RhDQoNCj4gPiBUaGFua3MhDQo+ID4NCj4gPiBHcntv ZXRqZSxlZXRpbmd9cywNCj4gPg0KPiA+ICAgICAgICAgICAgICAgICAgICAgICAgIEdlZXJ0DQo+ ID4NCj4gPiAtLQ0KPiA+IEdlZXJ0IFV5dHRlcmhvZXZlbiAtLSBUaGVyZSdzIGxvdHMgb2YgTGlu dXggYmV5b25kIGlhMzIgLS0gZ2VlcnRAbGludXgtbTY4ay5vcmcNCj4gPg0KPiA+IEluIHBlcnNv bmFsIGNvbnZlcnNhdGlvbnMgd2l0aCB0ZWNobmljYWwgcGVvcGxlLCBJIGNhbGwgbXlzZWxmIGEg aGFja2VyLiBCdXQNCj4gPiB3aGVuIEknbSB0YWxraW5nIHRvIGpvdXJuYWxpc3RzIEkganVzdCBz YXkgInByb2dyYW1tZXIiIG9yIHNvbWV0aGluZyBsaWtlIHRoYXQuDQo+ID4gICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAtLSBMaW51cyBUb3J2YWxkcw0K -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c index 96c97ff..9eb0cef 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c @@ -936,6 +936,144 @@ enum { PINMUX_GPIO_GP_ALL(), }; +/* - EtherAVB --------------------------------------------------------------- */ +static const unsigned int avb0_td_pins[] = { + /* + * AVB0_TD0, AVB0_TD1, + * AVB0_TD2, AVB0_TD3, + */ + RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 12), + RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14), +}; +static const unsigned int avb0_td_mux[] = { + AVB0_TD0_MARK, AVB0_TD1_MARK, + AVB0_TD2_MARK, AVB0_TD3_MARK, +}; +static const unsigned int avb0_rd_pins[] = { + /* + * AVB0_RD0, AVB0_RD1, + * AVB0_RD2, AVB0_RD3, + */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), + RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8), +}; +static const unsigned int avb0_rd_mux[] = { + AVB0_RD0_MARK, AVB0_RD1_MARK, + AVB0_RD2_MARK, AVB0_RD3_MARK, +}; +static const unsigned int avb0_tx_ctl_pins[] = { + /* AVB0_TX_CTL */ + RCAR_GP_PIN(5, 9), +}; +static const unsigned int avb0_tx_ctl_mux[] = { + AVB0_TX_CTL_MARK, +}; +static const unsigned int avb0_rx_ctl_pins[] = { + /* AVB0_RX_CTL */ + RCAR_GP_PIN(5, 3), +}; +static const unsigned int avb0_rx_ctl_mux[] = { + AVB0_RX_CTL_MARK, +}; +static const unsigned int avb0_txc_pins[] = { + /* AVB0_TXC */ + RCAR_GP_PIN(5, 10), +}; +static const unsigned int avb0_txc_mux[] = { + AVB0_TXC_MARK, +}; +static const unsigned int avb0_rxc_pins[] = { + /* AVB0_RXC */ + RCAR_GP_PIN(5, 4), +}; +static const unsigned int avb0_rxc_mux[] = { + AVB0_RXC_MARK, +}; +static const unsigned int avb0_txcrefclk_pins[] = { + /* AVB0_TXCREFCLK */ + RCAR_GP_PIN(5, 15), +}; +static const unsigned int avb0_txcrefclk_mux[] = { + AVB0_TXCREFCLK_MARK, +}; +static const unsigned int avb0_link_pins[] = { + /* AVB0_LINK */ + RCAR_GP_PIN(5, 20), +}; +static const unsigned int avb0_link_mux[] = { + AVB0_LINK_MARK, +}; +static const unsigned int avb0_magic_pins[] = { + /* AVB0_MAGIC */ + RCAR_GP_PIN(5, 18), +}; +static const unsigned int avb0_magic_mux[] = { + AVB0_MAGIC_MARK, +}; +static const unsigned int avb0_phy_int_pins[] = { + /* AVB0_PHY_INT */ + RCAR_GP_PIN(5, 19), +}; +static const unsigned int avb0_phy_int_mux[] = { + AVB0_PHY_INT_MARK, +}; +static const unsigned int avb0_mdc_pins[] = { + /* AVB0_MDC */ + RCAR_GP_PIN(5, 17), +}; +static const unsigned int avb0_mdc_mux[] = { + AVB0_MDC_MARK, +}; +static const unsigned int avb0_mdio_pins[] = { + /* AVB0_MDIO */ + RCAR_GP_PIN(5, 16), +}; +static const unsigned int avb0_mdio_mux[] = { + AVB0_MDIO_MARK, +}; +static const unsigned int avb0_avtp_pps_a_pins[] = { + /* AVB0_AVTP_PPS_A */ + RCAR_GP_PIN(5, 2), +}; +static const unsigned int avb0_avtp_pps_a_mux[] = { + AVB0_AVTP_PPS_A_MARK, +}; +static const unsigned int avb0_avtp_match_a_pins[] = { + /* AVB0_AVTP_MATCH_A */ + RCAR_GP_PIN(5, 1), +}; +static const unsigned int avb0_avtp_match_a_mux[] = { + AVB0_AVTP_MATCH_A_MARK, +}; +static const unsigned int avb0_avtp_capture_a_pins[] = { + /* AVB0_AVTP_CAPTURE_A */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int avb0_avtp_capture_a_mux[] = { + AVB0_AVTP_CAPTURE_A_MARK, +}; +static const unsigned int avb0_avtp_pps_b_pins[] = { + /* AVB0_AVTP_PPS_B */ + RCAR_GP_PIN(4, 16), +}; +static const unsigned int avb0_avtp_pps_b_mux[] = { + AVB0_AVTP_PPS_B_MARK, +}; +static const unsigned int avb0_avtp_match_b_pins[] = { + /* AVB0_AVTP_MATCH_B */ + RCAR_GP_PIN(4, 18), +}; +static const unsigned int avb0_avtp_match_b_mux[] = { + AVB0_AVTP_MATCH_B_MARK, +}; +static const unsigned int avb0_avtp_capture_b_pins[] = { + /* AVB0_AVTP_CAPTURE_B */ + RCAR_GP_PIN(4, 17), +}; +static const unsigned int avb0_avtp_capture_b_mux[] = { + AVB0_AVTP_CAPTURE_B_MARK, +}; + /* - I2C -------------------------------------------------------------------- */ static const unsigned int i2c0_pins[] = { /* SCL, SDA */ @@ -1165,6 +1303,24 @@ enum { }; static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(avb0_td), + SH_PFC_PIN_GROUP(avb0_rd), + SH_PFC_PIN_GROUP(avb0_tx_ctl), + SH_PFC_PIN_GROUP(avb0_rx_ctl), + SH_PFC_PIN_GROUP(avb0_txc), + SH_PFC_PIN_GROUP(avb0_rxc), + SH_PFC_PIN_GROUP(avb0_txcrefclk), + SH_PFC_PIN_GROUP(avb0_link), + SH_PFC_PIN_GROUP(avb0_magic), + SH_PFC_PIN_GROUP(avb0_phy_int), + SH_PFC_PIN_GROUP(avb0_mdc), + SH_PFC_PIN_GROUP(avb0_mdio), + SH_PFC_PIN_GROUP(avb0_avtp_pps_a), + SH_PFC_PIN_GROUP(avb0_avtp_match_a), + SH_PFC_PIN_GROUP(avb0_avtp_capture_a), + SH_PFC_PIN_GROUP(avb0_avtp_pps_b), + SH_PFC_PIN_GROUP(avb0_avtp_match_b), + SH_PFC_PIN_GROUP(avb0_avtp_capture_b), SH_PFC_PIN_GROUP(i2c0), SH_PFC_PIN_GROUP(i2c1), SH_PFC_PIN_GROUP(i2c2_a), @@ -1198,6 +1354,27 @@ enum { SH_PFC_PIN_GROUP(scif_clk), }; +static const char * const avb0_groups[] = { + "avb0_td", + "avb0_rd", + "avb0_tx_ctl", + "avb0_rx_ctl", + "avb0_txc", + "avb0_rxc", + "avb0_txcrefclk", + "avb0_link", + "avb0_magic", + "avb0_phy_int", + "avb0_mdc", + "avb0_mdio", + "avb0_avtp_pps_a", + "avb0_avtp_match_a", + "avb0_avtp_capture_a", + "avb0_avtp_pps_b", + "avb0_avtp_match_b", + "avb0_avtp_capture_b", +}; + static const char * const i2c0_groups[] = { "i2c0", }; @@ -1262,6 +1439,7 @@ enum { }; static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(avb0), SH_PFC_FUNCTION(i2c0), SH_PFC_FUNCTION(i2c1), SH_PFC_FUNCTION(i2c2),