From patchwork Wed Aug 9 12:19:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Shimoda X-Patchwork-Id: 799750 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=renesasgroup.onmicrosoft.com header.i=@renesasgroup.onmicrosoft.com header.b="JhsXBVfB"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xS9Qt6fQ1z9sNc for ; Wed, 9 Aug 2017 22:23:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752847AbdHIMXQ (ORCPT ); Wed, 9 Aug 2017 08:23:16 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:26032 "EHLO relmlie4.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751443AbdHIMXK (ORCPT ); Wed, 9 Aug 2017 08:23:10 -0400 Received: from unknown (HELO relmlir3.idc.renesas.com) ([10.200.68.153]) by relmlie4.idc.renesas.com with ESMTP; 09 Aug 2017 21:23:09 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir3.idc.renesas.com (Postfix) with ESMTP id D89B078D29; Wed, 9 Aug 2017 21:23:08 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.41,347,1498489200"; d="scan'208";a="254045100" Received: from mail-pu1apc01lp0021.outbound.protection.outlook.com (HELO APC01-PU1-obe.outbound.protection.outlook.com) ([65.55.88.21]) by relmlii2.idc.renesas.com with ESMTP/TLS/AES256-SHA256; 09 Aug 2017 21:23:07 +0900 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=renesasgroup.onmicrosoft.com; s=selector1-renesas-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=/2FR2JAybkfFg2lrSIYvRYlkxCI/ZPvwW/ZxZsvsmLk=; b=JhsXBVfBfWRBz3G7eMEbiH/byYuj3dgyMxULL+koZp0ZsNZXN+yjrTek7isuls4Sky073+AKJyljF1JfCsjrJYbp6tOVkyw0omgsHD9nTy4VJ9jyJ4MrtO1LegPqCjBB54hvD22qEb1xezKoksN2eAGXd7KUYa8pQVAOucNhBxY= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=<>; Received: from localhost.localdomain (211.11.155.138) by SG2PR06MB0984.apcprd06.prod.outlook.com (2a01:111:e400:5213::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.1320.16; Wed, 9 Aug 2017 12:23:04 +0000 From: Yoshihiro Shimoda To: laurent.pinchart@ideasonboard.com, geert+renesas@glider.be, linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Takeshi Kihara , Yoshihiro Shimoda Subject: [PATCH 3/8] pinctrl: sh-pfc: r8a77995: Add SCIF pins, groups and functions Date: Wed, 9 Aug 2017 21:19:42 +0900 Message-Id: <1502281187-24068-4-git-send-email-yoshihiro.shimoda.uh@renesas.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1502281187-24068-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> References: <1502281187-24068-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> MIME-Version: 1.0 X-Originating-IP: [211.11.155.138] X-ClientProxiedBy: KL1PR0601CA0003.apcprd06.prod.outlook.com (2603:1096:802:1::13) To SG2PR06MB0984.apcprd06.prod.outlook.com (2a01:111:e400:5213::26) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 52e73225-994a-409f-75b1-08d4df216354 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(300000500095)(300135000095)(300000501095)(300135300095)(300000502095)(300135100095)(22001)(2017030254152)(48565401081)(300000503095)(300135400095)(201703131423075)(201703031133081)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095); SRVR:SG2PR06MB0984; X-Microsoft-Exchange-Diagnostics: 1; SG2PR06MB0984; 3:V/cQ/FR4Cgg9qvXSe7ECv0TW7NOYq4N4V8oEvpFMxukZuFUno/iPr8VRUyDclvu/jFCc1AS++qTHQwj76M4kp8NsjD0utCwHPuCJ6uZYaazeKI3tXpLQ9V6ljRE9XmrK0ZbhcSYdKbRmtTijyX65lro7b8Eojd0cRuh/Um2EvLOa+koJC5rvcYmJ3+zbeIy4xBP1XCspghlqsZUiqQNvUsZTVBrD5bRnx1vQ2lESiON5INpbTjvpdjm3NSWFjRWV; 25:lYLmZoB2nlEqde8HY6N/V/mdk6ZFoHp+F8NTS536SEnrlae7FB3kv4i1Vrz+MEW9+b18hOuC9TBWU/awol+w19E/AnzLMPYJ3nsP0NtdOvnGARvhXFJ1u2r+g6Af193TC09hy9X28qhrcCMVPIOO90fhYzFRVmE9jmtmIs14eQPWwQ1NdEsTDi6tdxvyUjgT8WzSnSgr3ug2madx1tJP8WUZq3cJf2z9pacdkJOeEE7MhEayEyIjhWkYW5WuQDZFi/+sOCZP72sxoJQ41blFC30E8Btvs2WKaGOAWjLkknAPQnhiW41NDBWiV+Xlr2gdvJPSJaKNXDqSkY79r6FagQ==; 31:f/buEkvZtyrklFbtSGwXnQLz68bt4wpb8xPzw4KYqxgkpwq+tm39a9ApMlsKoXnOdTI3sQnJOqzl0pGEyaEAb5j7YeGl+8azPK2cAY3Xa8JSBJDWOiqkdo8SZEXTAqxBSbgLdGvFg6c2W14GuqJV58jX2haeUygqOmdvkoqcSX0Ow9YQICVYmsq9yCLUKOMW52Q02hOCw/WgmkQPMkn6hZyV9cVtTl2MJrFuuTwzX20= X-MS-TrafficTypeDiagnostic: SG2PR06MB0984: X-Microsoft-Exchange-Diagnostics: 1; SG2PR06MB0984; 20:sfdWvEF5BEt6O9bQJXDhR5Cf8bqC/W3YTnVIoNhtmfy1KyFRjE/X/IGu/bdcwuCM8n9nf642nRATt9i44q1ygaUqDjQ1x2UEAsoCywBnzBricM65cc8JOVupeYf0nO4dhGZQ9P3MgvJ90Ny5QHUEugnWqnY5BXB0WQjFcwsgSELY7G1NIh3aLaraRGP4KM6/w4gSJhOQ4iXaKQWND6wBK9W1imwQ/DB0Z/NMvw9X9mguSibezoEos2yGmUs1zbNUBql5CI45HhtbUr+E4CIpk2vklVHUH50ZNzbqOM05N144rymFL+wsq1I9WwpYNydfaC8KrY5Bveodr6+57lYbMJLOKbv2Is78p87yaIze+L4uzjCCg1l9K2UAcjBFQYb5FtweHkbll60KnSNcja+rWz/QBq0IB2fcYepJ7MfY3a7mTVVDLk46yokF+ugjjjz9r9I6pupXiV1nA5Bykcu3Io+Nb6oSNh3q+8tCzEYeq4ak1txbxJndtiqXUZRxJEXb; 4:hyFy3AGeGO0SwspVgyXI0KMdE2uO8YJk8NcQDegBM4we4ka5Kmtu6IG1Wlfh23UAzuyTn7ovqz+H9NOVO23IYirT12R7BL4VbUqgEEPGbnU/0CqkEoSKWXv3aZtP4HfD26X8FKkGvAjmqq4mAd/4hGxRY6DZ68GHmdJ9nZSxieCWTMj4cd4vfRAxmY2XU8gCluebRyZYKrXgaLLpvWdoyzbqKstRwJ9yy3hWE2JnqyC5CEYaBppDuzdnYBE5BVfa X-Exchange-Antispam-Report-Test: UriScan:; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(601004)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(100000703101)(100105400095)(6055026)(6041248)(20161123560025)(201703131423075)(201702281528075)(201703061421075)(201703061750153)(20161123558100)(20161123555025)(20161123562025)(20161123564025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095); SRVR:SG2PR06MB0984; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:SG2PR06MB0984; X-Forefront-PRVS: 0394259C80 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10019020)(4630300001)(7370300001)(6069001)(6009001)(39860400002)(39840400002)(39410400002)(39850400002)(39400400002)(39450400003)(199003)(189002)(50226002)(4326008)(36756003)(78352004)(8676002)(5003940100001)(498600001)(305945005)(189998001)(81156014)(97736004)(81166006)(25786009)(54906002)(6666003)(6486002)(6506006)(76176999)(2906002)(2950100002)(42882006)(6512007)(50986999)(53936002)(68736007)(42186005)(33646002)(105586002)(106356001)(47776003)(110136004)(66066001)(38730400002)(107886003)(50466002)(101416001)(7736002)(6116002)(3846002)(5660300001)(7350300001)(48376002)(3720700003); DIR:OUT; SFP:1102; SCL:1; SRVR:SG2PR06MB0984; H:localhost.localdomain; FPR:; SPF:None; PTR:InfoNoRecords; A:0; MX:0; LANG:en; Received-SPF: None (protection.outlook.com: localhost.localdomain does not designate permitted sender hosts) X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; SG2PR06MB0984; 23:hlMIwkGv/TrQawu0d5zCzX982dT36zsiPVgcQ29wG?= =?us-ascii?Q?4h8w9TTX0cDFgmPGYU/RR2Ycz+d24HS79gNNVEHI7qtCyUko8HatvDVxCjfR?= =?us-ascii?Q?dMArQ4+E0DN0x7Eh7IFd30z1+DeEqGjBgKH+e+1s20rULkpC+lcmQj7QgzUl?= =?us-ascii?Q?GXuzc7yIbwqX0Ca9M73e6XvKEBip1A5gbpOhLX1VvnBHnOu7CkGcYu3YcnSB?= =?us-ascii?Q?Ox/HxqtXLvARaOLc6e/jlbdqsm+fly4udRXBFLy2qQcti9G3pHdGfNtDQJ0O?= =?us-ascii?Q?Dg67iagk9roOqKXorqlHrxfb543YzICqOV9f1H16qnMZz5GOGkzil68CZn6Y?= =?us-ascii?Q?s+bk/BlBMMxWNgqPFm0ygc5Ahf+pOM82d67PHM4bsICcjId8WGEPhnyWGUZ6?= =?us-ascii?Q?YMKbkrlDnr5ZLsh14aivCq2RS0sYZaGGMRMwWkM4YtvpW02i7qyfelRNnrXH?= =?us-ascii?Q?XYPW1cYJbOUWakajM45Gltv141XWF2UV7N5C9EP6shpkRVoYL7a1ruuzX7/U?= =?us-ascii?Q?Ka0oUPlN1KUXgssgRxT6ZO3DPBWnYUa4GHF2nPbfMHZlf36ThWj91eDWosx4?= =?us-ascii?Q?yMkKHTydGCGMWZGsP5ymI41ytQ/38kQrSvCXZ4+nJrFy/k1j0zK9vKavUXSj?= =?us-ascii?Q?ozzrRlzXj/THWCw/uX0+XHH/rK1Rm1b71DPEFRc2VApeGHhIpRCyCgggvdWy?= =?us-ascii?Q?8LLnLjoLu32h3ffp67svKfBjSXcH/Zk3cvIjwQSIqjoozsXbO/aDipmnLnv4?= =?us-ascii?Q?jUoXKCS8I2okcU+UWtTNLUM2xIl2By18wDk4z3xK9wtC9drwpmlAVAMLrPSe?= =?us-ascii?Q?BjaSXcY6zF8RGmq0YJTIjPVXrpeP9TEKnJkj4Igl+WKMOb1djmD/UBBZYe7O?= =?us-ascii?Q?0PHlqEQsC1DCnnVCRMyRdPxuhzwAcjrF13urgPmebwYA8NqifZiZ9qy1g4Ac?= =?us-ascii?Q?8DxCRTCwTxOgysZmK3VBNyzBAVV8uSi4jmotDGB9dRCsHvT54K8Sa54xibN1?= =?us-ascii?Q?z67REl2fcxwGqIGDQig3MEaLGquJshC97FeZ7GL0O9G/V9RPcbfU8JY7bp5A?= =?us-ascii?Q?Be8flmlNMsJF3Fn5hDoh7ft0lRMX7YyenJUp4b3aBX5MV7frwAmnt7bMECKV?= =?us-ascii?Q?jgCwvhvUDjz7rIW0sLXDsEiPlx5AE6nETRjXEvtTjWeIEfCIRXHZgmCHU50N?= =?us-ascii?Q?dbTKpdUjZHIwIZHTX/E0Ak90p2pBySDDkhbotDg4fc3FlnYDL+TSLmcq/oR1?= =?us-ascii?Q?YEnMYzVnEBPWSX9Kzs/BnDRCWP4Sv3MEHPsB/LJ2JNI7ZU4s2JzlmDXm9/iC?= =?us-ascii?Q?/vdLRlNctju8BvCIf7Bihgd74Reshx5KrSLdlsr14z0Cs78049a3s4Uq1EQK?= =?us-ascii?Q?VN+Zg=3D=3D?= X-Microsoft-Exchange-Diagnostics: 1; SG2PR06MB0984; 6:CVpm3SNc2PaYqiXBZ40fAk48z9QfoVeRe71rGXOIfD8PplmAstNVvS8CErKVXrEgc3Zj/VB8MG1wBCXZXa3VmeCg9TB2hxbsq9HzhS0cmIGaXTfrwqVghsH/Aw/ZTtUCa5rlDWunOqr2pJL9DkI2bw/vvp+/X1c6T/80c6K22WHYVlUO3T5k7bIzvFi+0jvRAmHqNptb8sbcrzgwNW0UDwpxxVJdTGK+WV4mT39d0LetsArQgwBMo8oxSVSRnFg3ffCkpjmVCgbeC3ppSu/QIK0L7nrRwjI81ND41EHT3axwq0JbCGPckWIrGqq7KU3Mq4vecSveo1syGRG6cGtqcg==; 5:UXK2zqihs7WEPmwyaXdZg5G/1Icw3TTr16XYCXNKEa+EPdL5pvlR4puuEWiGaOjCFmVgahYKWzlrqs0rZfFKWLlFz4khvsVcIByiqaCS2GeZ4K0echFhS7JHtouukK/Q7Iv9snJ9fu1EI3fcyp79nQ==; 24:EZ+4/BGCkw2DL1q+EQhk6pdo28BcbBwkkvkK6BBzTObZuY82ESSt8Llu+h97W1APRlqf+PZ5j0hHxOD6CvCz4Gg6/InFB1f0hzLY9eEqGyw=; 7:sRdAsQgOmUlOWzw0SNtHxZKbh5vV/LfcSCISCNQV5l7SkGgYfT6hsbZDbwF0Bw0l274gHlXsPt+MXsnQS2SLMoAwivS771n2xI9sjrrzxXRUc+xKVP0rhum5Twb/ygJqBdm/5BmwSBkAC4EBxhzuUl4JT7tfNNK0XgkAvb467nI+LI0fgoHZAVvqX4FL+it2u1E4r2h4yFyOKXk+0PVxSrUqFZd1AOdNcCLddkqWVIY= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; SG2PR06MB0984; 20:exIIFjnPdLvXDPV7AbfT0g7O3tgOL/fSCN9oWJ82Eq/ZPa/DWa96T16/PzSPgpbguMG3zCR4yo8kbc10prfwuINmi5/jjVTAu5a8uDJ2CpaTM1gO9sSE17M29K+o/zkGDDknOZJPspoJ46fa3JxI6VEwZuO+AoVD6NwKuBwpquo= X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Aug 2017 12:23:04.5725 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: SG2PR06MB0984 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Takeshi Kihara This patch adds SCIF{0,1,2,3,4,5} pins, groups and functions to R8A77995 SoC. Signed-off-by: Takeshi Kihara Signed-off-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 262 ++++++++++++++++++++++++++++++++++ 1 file changed, 262 insertions(+) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c index 2670ee3..9be1993 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c @@ -936,10 +936,272 @@ enum { PINMUX_GPIO_GP_ALL(), }; +/* - SCIF0 ------------------------------------------------------------------ */ +static const unsigned int scif0_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 21), +}; +static const unsigned int scif0_data_a_mux[] = { + RX0_A_MARK, TX0_A_MARK, +}; +static const unsigned int scif0_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(4, 19), +}; +static const unsigned int scif0_clk_a_mux[] = { + SCK0_A_MARK, +}; +static const unsigned int scif0_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 28), +}; +static const unsigned int scif0_data_b_mux[] = { + RX0_B_MARK, TX0_B_MARK, +}; +static const unsigned int scif0_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 2), +}; +static const unsigned int scif0_clk_b_mux[] = { + SCK0_B_MARK, +}; +static const unsigned int scif0_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(4, 24), RCAR_GP_PIN(4, 23), +}; +static const unsigned int scif0_ctrl_mux[] = { + RTS0_N_TANS_MARK, CTS0_N_MARK, +}; +/* - SCIF1 ------------------------------------------------------------------ */ +static const unsigned int scif1_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(4, 23), RCAR_GP_PIN(4, 24), +}; +static const unsigned int scif1_data_a_mux[] = { + RX1_A_MARK, TX1_A_MARK, +}; +static const unsigned int scif1_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(4, 22), +}; +static const unsigned int scif1_clk_a_mux[] = { + SCK1_A_MARK, +}; +static const unsigned int scif1_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(2, 26), RCAR_GP_PIN(2, 28), +}; +static const unsigned int scif1_data_b_mux[] = { + RX1_B_MARK, TX1_B_MARK, +}; +static const unsigned int scif1_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(2, 25), +}; +static const unsigned int scif1_clk_b_mux[] = { + SCK1_B_MARK, +}; +static const unsigned int scif1_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 10), +}; +static const unsigned int scif1_ctrl_mux[] = { + RTS1_N_TANS_MARK, CTS1_N_MARK, +}; + +/* - SCIF2 ------------------------------------------------------------------ */ +static const unsigned int scif2_data_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(4, 26), RCAR_GP_PIN(4, 27), +}; +static const unsigned int scif2_data_mux[] = { + RX2_MARK, TX2_MARK, +}; +static const unsigned int scif2_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(4, 25), +}; +static const unsigned int scif2_clk_mux[] = { + SCK2_MARK, +}; +/* - SCIF3 ------------------------------------------------------------------ */ +static const unsigned int scif3_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(2, 31), RCAR_GP_PIN(4, 00), +}; +static const unsigned int scif3_data_a_mux[] = { + RX3_A_MARK, TX3_A_MARK, +}; +static const unsigned int scif3_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(2, 30), +}; +static const unsigned int scif3_clk_a_mux[] = { + SCK3_A_MARK, +}; +static const unsigned int scif3_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 29), RCAR_GP_PIN(1, 31), +}; +static const unsigned int scif3_data_b_mux[] = { + RX3_B_MARK, TX3_B_MARK, +}; +static const unsigned int scif3_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 30), +}; +static const unsigned int scif3_clk_b_mux[] = { + SCK3_B_MARK, +}; +/* - SCIF4 ------------------------------------------------------------------ */ +static const unsigned int scif4_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), +}; +static const unsigned int scif4_data_a_mux[] = { + RX4_A_MARK, TX4_A_MARK, +}; +static const unsigned int scif4_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(2, 6), +}; +static const unsigned int scif4_clk_a_mux[] = { + SCK4_A_MARK, +}; +static const unsigned int scif4_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 17), +}; +static const unsigned int scif4_data_b_mux[] = { + RX4_B_MARK, TX4_B_MARK, +}; +static const unsigned int scif4_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 15), +}; +static const unsigned int scif4_clk_b_mux[] = { + SCK4_B_MARK, +}; +/* - SCIF5 ------------------------------------------------------------------ */ +static const unsigned int scif5_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 8), +}; +static const unsigned int scif5_data_a_mux[] = { + RX5_A_MARK, TX5_A_MARK, +}; +static const unsigned int scif5_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(0, 6), +}; +static const unsigned int scif5_clk_a_mux[] = { + SCK5_A_MARK, +}; +static const unsigned int scif5_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5), +}; +static const unsigned int scif5_data_b_mux[] = { + RX5_B_MARK, TX5_B_MARK, +}; +static const unsigned int scif5_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 3), +}; +static const unsigned int scif5_clk_b_mux[] = { + SCK5_B_MARK, +}; +/* - SCIF Clock ------------------------------------------------------------- */ +static const unsigned int scif_clk_pins[] = { + /* SCIF_CLK */ + RCAR_GP_PIN(2, 27), +}; +static const unsigned int scif_clk_mux[] = { + SCIF_CLK_MARK, +}; + static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(scif0_data_a), + SH_PFC_PIN_GROUP(scif0_clk_a), + SH_PFC_PIN_GROUP(scif0_data_b), + SH_PFC_PIN_GROUP(scif0_clk_b), + SH_PFC_PIN_GROUP(scif0_ctrl), + SH_PFC_PIN_GROUP(scif1_data_a), + SH_PFC_PIN_GROUP(scif1_clk_a), + SH_PFC_PIN_GROUP(scif1_data_b), + SH_PFC_PIN_GROUP(scif1_clk_b), + SH_PFC_PIN_GROUP(scif1_ctrl), + SH_PFC_PIN_GROUP(scif2_data), + SH_PFC_PIN_GROUP(scif2_clk), + SH_PFC_PIN_GROUP(scif3_data_a), + SH_PFC_PIN_GROUP(scif3_clk_a), + SH_PFC_PIN_GROUP(scif3_data_b), + SH_PFC_PIN_GROUP(scif3_clk_b), + SH_PFC_PIN_GROUP(scif4_data_a), + SH_PFC_PIN_GROUP(scif4_clk_a), + SH_PFC_PIN_GROUP(scif4_data_b), + SH_PFC_PIN_GROUP(scif4_clk_b), + SH_PFC_PIN_GROUP(scif5_data_a), + SH_PFC_PIN_GROUP(scif5_clk_a), + SH_PFC_PIN_GROUP(scif5_data_b), + SH_PFC_PIN_GROUP(scif5_clk_b), + SH_PFC_PIN_GROUP(scif_clk), +}; + +static const char * const scif0_groups[] = { + "scif0_data_a", + "scif0_clk_a", + "scif0_data_b", + "scif0_clk_b", + "scif0_ctrl", +}; + +static const char * const scif1_groups[] = { + "scif1_data_a", + "scif1_clk_a", + "scif1_data_b", + "scif1_clk_b", + "scif1_ctrl", +}; + +static const char * const scif2_groups[] = { + "scif2_data", + "scif2_clk", +}; + +static const char * const scif3_groups[] = { + "scif3_data_a", + "scif3_clk_a", + "scif3_data_b", + "scif3_clk_b", +}; + +static const char * const scif4_groups[] = { + "scif4_data_a", + "scif4_clk_a", + "scif4_data_b", + "scif4_clk_b", +}; + +static const char * const scif5_groups[] = { + "scif5_data_a", + "scif5_clk_a", + "scif5_data_b", + "scif5_clk_b", +}; + +static const char * const scif_clk_groups[] = { + "scif_clk", }; static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(scif0), + SH_PFC_FUNCTION(scif1), + SH_PFC_FUNCTION(scif2), + SH_PFC_FUNCTION(scif3), + SH_PFC_FUNCTION(scif4), + SH_PFC_FUNCTION(scif5), + SH_PFC_FUNCTION(scif_clk), }; static const struct pinmux_cfg_reg pinmux_config_regs[] = {