From patchwork Wed Aug 9 10:07:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZmI5YGl5rSq?= X-Patchwork-Id: 799616 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xS6SN2m3xz9sN5 for ; Wed, 9 Aug 2017 20:09:24 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752943AbdHIKIU (ORCPT ); Wed, 9 Aug 2017 06:08:20 -0400 Received: from regular1.263xmail.com ([211.150.99.135]:39706 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752420AbdHIKIS (ORCPT ); Wed, 9 Aug 2017 06:08:18 -0400 Received: from chenjh?rock-chips.com (unknown [192.168.167.156]) by regular1.263xmail.com (Postfix) with ESMTP id ABF961E725; Wed, 9 Aug 2017 18:08:13 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id 0B2973CA; Wed, 9 Aug 2017 18:08:12 +0800 (CST) X-RL-SENDER: chenjh@rock-chips.com X-FST-TO: gnurou@gmail.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: chenjh@rock-chips.com X-UNIQUE-TAG: <2af93fe57fd085086f23d65d68e985fe> X-ATTACHMENT-NUM: 0 X-SENDER: chenjh@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 21858339GJT; Wed, 09 Aug 2017 18:08:14 +0800 (CST) From: Joseph Chen To: gnurou@gmail.com, linus.walleij@linaro.org, dmitry.torokhov@gmail.com Cc: huangtao@rock-chips.com, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, broonie@kernel.org, zhangqing@rock-chips.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, lgirdwood@gmail.com, linux-rockchip@lists.infradead.org, wdc@rock-chips.com, tony.xie@rock-chips.com, linux-input@vger.kernel.org, mark.rutland@arm.com, w.egorov@phytec.de, Joseph Chen Subject: [PATCH v9 12/12] pinctrl: dt-bindings: add bindings for Rockchip RK805 PMIC Date: Wed, 9 Aug 2017 18:07:53 +0800 Message-Id: <1502273273-12728-1-git-send-email-chenjh@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1502273060-12201-1-git-send-email-chenjh@rock-chips.com> References: <1502273060-12201-1-git-send-email-chenjh@rock-chips.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Joseph Chen Acked-by: Linus Walleij --- .../devicetree/bindings/pinctrl/pinctrl-rk805.txt | 63 ++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt new file mode 100644 index 0000000..eee3dc2 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt @@ -0,0 +1,63 @@ +Pincontrol driver for RK805 Power management IC. + +RK805 has 2 pins which can be configured as GPIO output only. + +Please refer file +for details of the common pinctrl bindings used by client devices, +including the meaning of the phrase "pin configuration node". + +Optional Pinmux properties: +-------------------------- +Following properties are required if default setting of pins are required +at boot. +- pinctrl-names: A pinctrl state named per . +- pinctrl[0...n]: Properties to contain the phandle for pinctrl states per + . + +The pin configurations are defined as child of the pinctrl states node. Each +sub-node have following properties: + +Required properties: +------------------ +- #gpio-cells: Should be two. The first cell is the pin number and the + second is the GPIO flags. + +- gpio-controller: Marks the device node as a GPIO controller. + +- pins: List of pins. Valid values of pins properties are: gpio0, gpio1. + +First 2 properties must be added in the RK805 PMIC node, documented in +Documentation/devicetree/bindings/mfd/rk808.txt + +Optional properties: +------------------- +Following are optional properties defined as pinmux DT binding document +. Absence of properties will leave the configuration +on default. + function, + output-low, + output-high. + +Valid values for function properties are: gpio. + +Theres is also not customised properties for any GPIO. + +Example: +-------- +rk805: rk805@18 { + compatible = "rockchip,rk805"; + ... + gpio-controller; + #gpio-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>, <&rk805_default>; + + rk805_default: pinmux { + gpio01 { + pins = "gpio0", "gpio1"; + function = "gpio"; + output-high; + }; + }; +};