[6/6,v2,i386,testsuite] Add tests, fix bug in check_avx2_hw_available

Message ID 20170808192819.29707-1-daniel.santos@pobox.com
State New
Headers show

Commit Message

Daniel Santos Aug. 8, 2017, 7:28 p.m.
This update adds documentation for the new effective taregts in addition to a
few existing effective targets that were undocumented.

Changes to lib/target-supports.exp and documentation:
* Add effective-targets avx512f and avx512f_runtime (needed for new
  tests).
* Corrects bug in check_avx2_hw_available.
* Adds documentation for effective-targets avx2, avx2_runtime (both
  missing), avx512f and avx512f_runtime.

The following tests are added.  The testcase in the PR is used as a base
and relevant variants are added to test other factors affected by the
patch set.

pr80969-1.c   Base test case.
pr80969-2.c   With ms to sysv call.
pr80969-2a.c  With ms to sysv call using stubs.
pr80969-3.c   With alloca (for DRAP test).
pr80969-4.c   With va_args passed via va_list
pr80969-4a.c  With va_args passed via va_list and ms to sysv call.
pr80969-4b.c  With va_args passed via va_list and ms to sysv call using
              stubs.

Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
---
 gcc/doc/sourcebuild.texi                   |  12 +++
 gcc/testsuite/gcc.target/i386/pr80969-1.c  |  16 ++++
 gcc/testsuite/gcc.target/i386/pr80969-2.c  |  26 ++++++
 gcc/testsuite/gcc.target/i386/pr80969-2a.c |  26 ++++++
 gcc/testsuite/gcc.target/i386/pr80969-3.c  |  31 ++++++++
 gcc/testsuite/gcc.target/i386/pr80969-4.c  | 123 ++++++++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/pr80969-4a.c | 124 +++++++++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/pr80969-4b.c | 124 +++++++++++++++++++++++++++++
 gcc/testsuite/lib/target-supports.exp      |  66 +++++++++++++++
 9 files changed, 548 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-2a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-4.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-4a.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr80969-4b.c

Patch

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 85af8778167..66f040f212d 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1852,6 +1852,18 @@  Target supports compiling @code{avx} instructions.
 @item avx_runtime
 Target supports the execution of @code{avx} instructions.
 
+@item avx2
+Target supports compiling @code{avx2} instructions.
+
+@item avx2_runtime
+Target supports the execution of @code{avx2} instructions.
+
+@item avx512f
+Target supports compiling @code{avx512f} instructions.
+
+@item avx512f_runtime
+Target supports the execution of @code{avx512f} instructions.
+
 @item cell_hw
 Test system can execute AltiVec and Cell PPU instructions.
 
diff --git a/gcc/testsuite/gcc.target/i386/pr80969-1.c b/gcc/testsuite/gcc.target/i386/pr80969-1.c
new file mode 100644
index 00000000000..eb8d767a778
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr80969-1.c
@@ -0,0 +1,16 @@ 
+/* { dg-do run } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+int a[56];
+int b;
+int main (int argc, char *argv[]) {
+  int c;
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    a[b] = c;
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr80969-2.c b/gcc/testsuite/gcc.target/i386/pr80969-2.c
new file mode 100644
index 00000000000..e868d6c7e5c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr80969-2.c
@@ -0,0 +1,26 @@ 
+/* { dg-do run } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test when calling a sysv func.  */
+
+int a[56];
+int b;
+
+static void __attribute__((sysv_abi)) sysv ()
+{
+}
+
+void __attribute__((sysv_abi)) (*volatile const sysv_noinfo)() = sysv;
+
+int main (int argc, char *argv[]) {
+  int c;
+  sysv_noinfo ();
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    a[b] = c;
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr80969-2a.c b/gcc/testsuite/gcc.target/i386/pr80969-2a.c
new file mode 100644
index 00000000000..071a90534a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr80969-2a.c
@@ -0,0 +1,26 @@ 
+/* { dg-do run } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f -mcall-ms2sysv-xlogues" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test when calling a sysv func using save/restore stubs.  */
+
+int a[56];
+int b;
+
+static void __attribute__((sysv_abi)) sysv ()
+{
+}
+
+void __attribute__((sysv_abi)) (*volatile const sysv_noinfo)() = sysv;
+
+int main (int argc, char *argv[]) {
+  int c;
+  sysv_noinfo ();
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    a[b] = c;
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr80969-3.c b/gcc/testsuite/gcc.target/i386/pr80969-3.c
new file mode 100644
index 00000000000..5982981b55c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr80969-3.c
@@ -0,0 +1,31 @@ 
+/* { dg-do run } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test with alloca (and DRAP).  */
+
+#include <alloca.h>
+
+int a[56];
+volatile int b = -12345;
+volatile const int d = 42;
+
+void foo (int *x, int y, int z)
+{
+}
+
+void (*volatile const foo_noinfo)(int *, int, int) = foo;
+
+int main (int argc, char *argv[]) {
+  int c;
+  int *e = alloca (d);
+  foo_noinfo (e, d, 0);
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    foo_noinfo (e, d, c);
+    a[-(b % 56)] = c;
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr80969-4.c b/gcc/testsuite/gcc.target/i386/pr80969-4.c
new file mode 100644
index 00000000000..1ec54d081cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr80969-4.c
@@ -0,0 +1,123 @@ 
+/* { dg-do run { target avx512f_runtime } } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test with avx512 and va_args.  */
+
+#include <stdarg.h>
+#include <assert.h>
+
+#include "avx-check.h"
+
+int a[56];
+int b;
+
+__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 };
+__m512d n2 = { -93.83, 893.318, 3994.3, -39484.0, 830.32, -328.32, 3.14159, 2.99792 };
+__m128i n3 = { 893, -3180 } ;
+int n4 = 324;
+double n5 = 103.3;
+__m128i n6 = { -123, 2 };
+__m128d n7 = { -91.387, -8193.518 };
+__m256d n8 = { -123.3, 2.3, 3.4, -10.03 };
+__m128 n9 = { -123.3, 2.3, 3.4, -10.03 };
+__m128i n10 = { 1233, -100 };
+int n11 = 407;
+double n12 = 304.9;
+__m128i n13 = { 233, -110 };
+__m256i n14 = { -1233, 23, 34, -1003 };
+__m512i n15 = { -393, -180, 213.4, 1119.03, -8193.518, -100, 304.9, 2.99792 };
+__m128d n16 = { 73.0, 63.18 };
+__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 };
+__m128 n18 = { -183.3, 22.3, 13.4, -19.03 };
+
+__m128 e1;
+__m512d e2;
+__m128i e3;
+int e4;
+double e5;
+__m128i e6;
+__m128d e7;
+__m256d e8;
+__m128 e9;
+__m128i e10;
+int e11;
+double e12;
+__m128i e13;
+__m256i e14;
+__m512i e15;
+__m128d e16;
+__m256 e17;
+__m128 e18;
+
+static void
+__attribute__((noinline))
+bar (__m128 a1, __m512d a2, __m128i a3, va_list va_arglist)
+{
+  e1 = a1;
+  e2 = a2;
+  e3 = a3;
+  e4 = va_arg (va_arglist, int);
+  e5 = va_arg (va_arglist, double);
+  e6 = va_arg (va_arglist, __m128i);
+  e7 = va_arg (va_arglist, __m128d);
+  e8 = va_arg (va_arglist, __m256d);
+  e9 = va_arg (va_arglist, __m128);
+  e10 = va_arg (va_arglist, __m128i);
+  e11 = va_arg (va_arglist, int);
+  e12 = va_arg (va_arglist, double);
+  e13 = va_arg (va_arglist, __m128i);
+  e14 = va_arg (va_arglist, __m256i);
+  e15 = va_arg (va_arglist, __m512i);
+  e16 = va_arg (va_arglist, __m128d);
+  e17 = va_arg (va_arglist, __m256);
+  e18 = va_arg (va_arglist, __m128);
+}
+
+void (*volatile const bar_noinfo) (__m128, __m512d, __m128i, va_list) = bar;
+
+static void
+__attribute__((noinline))
+foo (__m128 a1, __m512d a2, __m128i a3, ...)
+{
+  va_list va_arglist;
+  int c;
+
+  va_start (va_arglist, a3);
+  bar_noinfo (a1, a2, a3, va_arglist);
+  va_end (va_arglist);
+
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    a[b] = c;
+  }
+}
+void (*volatile const foo_noinfo) (__m128, __m512d, __m128i, ...) = foo;
+
+static void
+avx_test (void)
+{
+  foo (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12,
+       n13, n14, n15, n16, n17, n18);
+  assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0);
+  assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0);
+  assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0);
+  assert (n4 == e4);
+  assert (n5 == e5);
+  assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0);
+  assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0);
+  assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0);
+  assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0);
+  assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0);
+  assert (n11 == e11);
+  assert (n12 == e12);
+  assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0);
+  assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0);
+  assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0);
+  assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0);
+  assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0);
+  assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0);
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/pr80969-4a.c b/gcc/testsuite/gcc.target/i386/pr80969-4a.c
new file mode 100644
index 00000000000..faf263170e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr80969-4a.c
@@ -0,0 +1,124 @@ 
+/* { dg-do run { target avx512f_runtime } } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test with avx512, va_args, and ms to sysv call.  */
+
+#include <stdarg.h>
+#include <assert.h>
+
+#include "avx-check.h"
+
+int a[56];
+int b;
+
+__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 };
+__m512d n2 = { -93.83, 893.318, 3994.3, -39484.0, 830.32, -328.32, 3.14159, 2.99792 };
+__m128i n3 = { 893, -3180 } ;
+int n4 = 324;
+double n5 = 103.3;
+__m128i n6 = { -123, 2 };
+__m128d n7 = { -91.387, -8193.518 };
+__m256d n8 = { -123.3, 2.3, 3.4, -10.03 };
+__m128 n9 = { -123.3, 2.3, 3.4, -10.03 };
+__m128i n10 = { 1233, -100 };
+int n11 = 407;
+double n12 = 304.9;
+__m128i n13 = { 233, -110 };
+__m256i n14 = { -1233, 23, 34, -1003 };
+__m512i n15 = { -393, -180, 213.4, 1119.03, -8193.518, -100, 304.9, 2.99792 };
+__m128d n16 = { 73.0, 63.18 };
+__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 };
+__m128 n18 = { -183.3, 22.3, 13.4, -19.03 };
+
+__m128 e1;
+__m512d e2;
+__m128i e3;
+int e4;
+double e5;
+__m128i e6;
+__m128d e7;
+__m256d e8;
+__m128 e9;
+__m128i e10;
+int e11;
+double e12;
+__m128i e13;
+__m256i e14;
+__m512i e15;
+__m128d e16;
+__m256 e17;
+__m128 e18;
+
+static void
+__attribute__((noinline, sysv_abi))
+bar (__m128 a1, __m512d a2, __m128i a3, va_list va_arglist)
+{
+  e1 = a1;
+  e2 = a2;
+  e3 = a3;
+  e4 = va_arg (va_arglist, int);
+  e5 = va_arg (va_arglist, double);
+  e6 = va_arg (va_arglist, __m128i);
+  e7 = va_arg (va_arglist, __m128d);
+  e8 = va_arg (va_arglist, __m256d);
+  e9 = va_arg (va_arglist, __m128);
+  e10 = va_arg (va_arglist, __m128i);
+  e11 = va_arg (va_arglist, int);
+  e12 = va_arg (va_arglist, double);
+  e13 = va_arg (va_arglist, __m128i);
+  e14 = va_arg (va_arglist, __m256i);
+  e15 = va_arg (va_arglist, __m512i);
+  e16 = va_arg (va_arglist, __m128d);
+  e17 = va_arg (va_arglist, __m256);
+  e18 = va_arg (va_arglist, __m128);
+}
+
+void __attribute__((sysv_abi))
+(*volatile const bar_noinfo) (__m128, __m512d, __m128i, va_list) = bar;
+
+static void
+__attribute__((noinline))
+foo (__m128 a1, __m512d a2, __m128i a3, ...)
+{
+  va_list va_arglist;
+  int c;
+
+  va_start (va_arglist, a3);
+  bar_noinfo (a1, a2, a3, va_arglist);
+  va_end (va_arglist);
+
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    a[b] = c;
+  }
+}
+void (*volatile const foo_noinfo) (__m128, __m512d, __m128i, ...) = foo;
+
+static void
+avx_test (void)
+{
+  foo (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12,
+       n13, n14, n15, n16, n17, n18);
+  assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0);
+  assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0);
+  assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0);
+  assert (n4 == e4);
+  assert (n5 == e5);
+  assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0);
+  assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0);
+  assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0);
+  assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0);
+  assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0);
+  assert (n11 == e11);
+  assert (n12 == e12);
+  assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0);
+  assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0);
+  assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0);
+  assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0);
+  assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0);
+  assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0);
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/pr80969-4b.c b/gcc/testsuite/gcc.target/i386/pr80969-4b.c
new file mode 100644
index 00000000000..9bc8995e58e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr80969-4b.c
@@ -0,0 +1,124 @@ 
+/* { dg-do run { target avx512f_runtime } } */
+/* { dg-options "-Ofast -mabi=ms -mavx512f -mcall-ms2sysv-xlogues" } */
+/* { dg-require-effective-target avx512f } */
+
+/* Test with avx512, va_args, and ms to sysv call using save/restore stubs.  */
+
+#include <stdarg.h>
+#include <assert.h>
+
+#include "avx-check.h"
+
+int a[56];
+int b;
+
+__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 };
+__m512d n2 = { -93.83, 893.318, 3994.3, -39484.0, 830.32, -328.32, 3.14159, 2.99792 };
+__m128i n3 = { 893, -3180 } ;
+int n4 = 324;
+double n5 = 103.3;
+__m128i n6 = { -123, 2 };
+__m128d n7 = { -91.387, -8193.518 };
+__m256d n8 = { -123.3, 2.3, 3.4, -10.03 };
+__m128 n9 = { -123.3, 2.3, 3.4, -10.03 };
+__m128i n10 = { 1233, -100 };
+int n11 = 407;
+double n12 = 304.9;
+__m128i n13 = { 233, -110 };
+__m256i n14 = { -1233, 23, 34, -1003 };
+__m512i n15 = { -393, -180, 213.4, 1119.03, -8193.518, -100, 304.9, 2.99792 };
+__m128d n16 = { 73.0, 63.18 };
+__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 };
+__m128 n18 = { -183.3, 22.3, 13.4, -19.03 };
+
+__m128 e1;
+__m512d e2;
+__m128i e3;
+int e4;
+double e5;
+__m128i e6;
+__m128d e7;
+__m256d e8;
+__m128 e9;
+__m128i e10;
+int e11;
+double e12;
+__m128i e13;
+__m256i e14;
+__m512i e15;
+__m128d e16;
+__m256 e17;
+__m128 e18;
+
+static void
+__attribute__((noinline, sysv_abi))
+bar (__m128 a1, __m512d a2, __m128i a3, va_list va_arglist)
+{
+  e1 = a1;
+  e2 = a2;
+  e3 = a3;
+  e4 = va_arg (va_arglist, int);
+  e5 = va_arg (va_arglist, double);
+  e6 = va_arg (va_arglist, __m128i);
+  e7 = va_arg (va_arglist, __m128d);
+  e8 = va_arg (va_arglist, __m256d);
+  e9 = va_arg (va_arglist, __m128);
+  e10 = va_arg (va_arglist, __m128i);
+  e11 = va_arg (va_arglist, int);
+  e12 = va_arg (va_arglist, double);
+  e13 = va_arg (va_arglist, __m128i);
+  e14 = va_arg (va_arglist, __m256i);
+  e15 = va_arg (va_arglist, __m512i);
+  e16 = va_arg (va_arglist, __m128d);
+  e17 = va_arg (va_arglist, __m256);
+  e18 = va_arg (va_arglist, __m128);
+}
+
+void __attribute__((sysv_abi))
+(*volatile const bar_noinfo) (__m128, __m512d, __m128i, va_list) = bar;
+
+static void
+__attribute__((noinline))
+foo (__m128 a1, __m512d a2, __m128i a3, ...)
+{
+  va_list va_arglist;
+  int c;
+
+  va_start (va_arglist, a3);
+  bar_noinfo (a1, a2, a3, va_arglist);
+  va_end (va_arglist);
+
+  for (; b; b++) {
+    c = b;
+    if (b & 1)
+      c = 2;
+    a[b] = c;
+  }
+}
+void (*volatile const foo_noinfo) (__m128, __m512d, __m128i, ...) = foo;
+
+static void
+avx_test (void)
+{
+  foo (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12,
+       n13, n14, n15, n16, n17, n18);
+  assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0);
+  assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0);
+  assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0);
+  assert (n4 == e4);
+  assert (n5 == e5);
+  assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0);
+  assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0);
+  assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0);
+  assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0);
+  assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0);
+  assert (n11 == e11);
+  assert (n12 == e12);
+  assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0);
+  assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0);
+  assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0);
+  assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0);
+  assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0);
+  assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0);
+}
+
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 5a6562794b2..554ec10e4b1 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1642,6 +1642,29 @@  proc check_avx_os_support_available { } {
     }]
 }
 
+# Return 1 if the target OS supports running AVX executables, 0
+# otherwise.  Cache the result.
+
+proc check_avx512_os_support_available { } {
+    return [check_cached_effective_target avx512_os_support_available {
+	# If this is not the right target then we can skip the test.
+	if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+	    expr 0
+	} else {
+	    # Check that OS has AVX512, AVX and SSE saving enabled.
+	    check_runtime_nocache avx512_os_support_available {
+		int main ()
+		{
+		  unsigned int eax, edx;
+
+		  asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
+		  return (eax & 0xe6) != 0xe6;
+		}
+	    } ""
+	}
+    }]
+}
+
 # Return 1 if the target supports executing SSE instructions, 0
 # otherwise.  Cache the result.
 
@@ -1822,6 +1845,7 @@  proc check_avx2_hw_available { } {
 	    expr 0
 	} else {
 	    check_runtime_nocache avx2_hw_available {
+		#include <stddef.h>
 		#include "cpuid.h"
 		int main ()
 		{
@@ -1842,6 +1866,37 @@  proc check_avx2_hw_available { } {
     }]
 }
 
+# Return 1 if the target supports executing AVX512 foundation instructions, 0
+# otherwise.  Cache the result.
+
+proc check_avx512f_hw_available { } {
+    return [check_cached_effective_target avx512f_hw_available {
+	# If this is not the right target then we can skip the test.
+	if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+	    expr 0
+	} else {
+	    check_runtime_nocache avx512f_hw_available {
+		#include <stddef.h>
+		#include "cpuid.h"
+		int main ()
+		{
+		  unsigned int eax, ebx, ecx, edx;
+		  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)
+		      || !(ecx & bit_OSXSAVE))
+		    return 1;
+
+		  if (__get_cpuid_max (0, NULL) < 7)
+		    return 1;
+
+		  __cpuid_count (7, 0, eax, ebx, ecx, edx);
+
+		  return !(ebx & bit_AVX512F);
+		}
+	    } ""
+	}
+    }]
+}
+
 # Return 1 if the target supports running SSE executables, 0 otherwise.
 
 proc check_effective_target_sse_runtime { } {
@@ -1928,6 +1983,17 @@  proc check_effective_target_avx2_runtime { } {
     return 0
 }
 
+# Return 1 if the target supports running AVX512f executables, 0 otherwise.
+
+proc check_effective_target_avx512f_runtime { } {
+    if { [check_effective_target_avx512f]
+	 && [check_avx512f_hw_available]
+	 && [check_avx512_os_support_available] } {
+	return 1
+    }
+    return 0
+}
+
 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
 # move instructions for moves from GPR to FPR.