@@ -132,17 +132,24 @@ struct uniphier_sd_priv {
#define UNIPHIER_SD_CAP_NONREMOVABLE BIT(0) /* Nonremovable e.g. eMMC */
#define UNIPHIER_SD_CAP_DMA_INTERNAL BIT(1) /* have internal DMA engine */
#define UNIPHIER_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is available */
+#define UNIPHIER_SD_CAP_64BIT BIT(3) /* Controller is 64bit */
};
static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, unsigned int reg)
{
- return readl(priv->regbase + reg);
+ if (priv->caps & UNIPHIER_SD_CAP_64BIT)
+ return readl(priv->regbase + (reg << 1));
+ else
+ return readl(priv->regbase + reg);
}
static void uniphier_sd_writel(struct uniphier_sd_priv *priv,
const u32 val, unsigned int reg)
{
- writel(val, priv->regbase + reg);
+ if (priv->caps & UNIPHIER_SD_CAP_64BIT)
+ writel(val, priv->regbase + (reg << 1));
+ else
+ writel(val, priv->regbase + reg);
}
static dma_addr_t __dma_map_single(void *ptr, size_t size,
The Renesas RCar Gen3 contains the same controller, originally Matsushita, yet the register addresses are shifted by 1 to the left. The whole controller is also 64bit, including the data FIFOs and RSP registers. This patch adds support for handling the register IO by shifting the register offset by 1 in the IO accessor functions. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> --- drivers/mmc/uniphier-sd.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)