| Message ID | 20170807072548.3023-5-aik@ozlabs.ru (mailing list archive) |
|---|---|
| State | RFC |
| Headers | show |
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c index 233ca3fe4754..dca0a83f1560 100644 --- a/arch/powerpc/kernel/iommu.c +++ b/arch/powerpc/kernel/iommu.c @@ -936,6 +936,7 @@ void iommu_register_group(struct iommu_table_group *table_group, if (!name) return; iommu_group_set_name(grp, name); + iommu_group_set_caps(grp, 0, IOMMU_GROUP_CAP_ISOLATE_MSIX); kfree(name); }
This sets IOMMU_GROUP_CAP_ISOLATE_MSIX to a group unconditionally as there is no IOMMU-capable hardware without such a feature. On IBM POWERPC (POWER8) [1], PCI host bridge maintains BFDN-to-PE translation (PE stands for "partitionable endpoint"), and PE index is used to look at Interrupt Vector Table (IVT) to identify the interrupt server. Without these translations in place, MSIX messages won't pass PHB. [1] 3.2.4. MSI Design http://openpowerfoundation.org/wp-content/uploads/resources/IODA2Spec/IODA2WGSpec-1.0.0-20160217.pdf Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> --- arch/powerpc/kernel/iommu.c | 1 + 1 file changed, 1 insertion(+)