Patchwork hw/pl190.c: Fix writing of default vector address

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Submitter Peter Maydell
Date Jan. 20, 2011, 4:04 p.m.
Message ID <1295539492-6960-1-git-send-email-peter.maydell@linaro.org>
Download mbox | patch
Permalink /patch/79712/
State New
Headers show

Comments

Peter Maydell - Jan. 20, 2011, 4:04 p.m.
The PL190 implementation keeps the default vector address
in vect_addr[16], but we weren't using this for writes to
the DEFVECTADDR register. As a result of this fix the
default_addr structure member is unused and we can delete it.

Reported-by: Himanshu Chauhan <hschauhan@nulltrace.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
(This patch addresses Aurelien's comments on Himanshu's
patch from November: http://patchwork.ozlabs.org/patch/69768/)

 hw/pl190.c |    4 +---
 1 files changed, 1 insertions(+), 3 deletions(-)
Aurelien Jarno - Jan. 20, 2011, 4:28 p.m.
On Thu, Jan 20, 2011 at 04:04:52PM +0000, Peter Maydell wrote:
> The PL190 implementation keeps the default vector address
> in vect_addr[16], but we weren't using this for writes to
> the DEFVECTADDR register. As a result of this fix the
> default_addr structure member is unused and we can delete it.
> 
> Reported-by: Himanshu Chauhan <hschauhan@nulltrace.org>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> (This patch addresses Aurelien's comments on Himanshu's
> patch from November: http://patchwork.ozlabs.org/patch/69768/)
> 
>  hw/pl190.c |    4 +---
>  1 files changed, 1 insertions(+), 3 deletions(-)
> 
> diff --git a/hw/pl190.c b/hw/pl190.c
> index 17c279b..75f2ba1 100644
> --- a/hw/pl190.c
> +++ b/hw/pl190.c
> @@ -21,7 +21,6 @@ typedef struct {
>      uint32_t soft_level;
>      uint32_t irq_enable;
>      uint32_t fiq_select;
> -    uint32_t default_addr;
>      uint8_t vect_control[16];
>      uint32_t vect_addr[PL190_NUM_PRIO];
>      /* Mask containing interrupts with higher priority than this one.  */
> @@ -186,7 +185,7 @@ static void pl190_write(void *opaque, target_phys_addr_t offset, uint32_t val)
>              s->priority = s->prev_prio[s->priority];
>          break;
>      case 13: /* DEFVECTADDR */
> -        s->default_addr = val;
> +        s->vect_addr[16] = val;
>          break;
>      case 0xc0: /* ITCR */
>          if (val) {
> @@ -252,7 +251,6 @@ static const VMStateDescription vmstate_pl190 = {
>          VMSTATE_UINT32(soft_level, pl190_state),
>          VMSTATE_UINT32(irq_enable, pl190_state),
>          VMSTATE_UINT32(fiq_select, pl190_state),
> -        VMSTATE_UINT32(default_addr, pl190_state),
>          VMSTATE_UINT8_ARRAY(vect_control, pl190_state, 16),
>          VMSTATE_UINT32_ARRAY(vect_addr, pl190_state, PL190_NUM_PRIO),
>          VMSTATE_UINT32_ARRAY(prio_mask, pl190_state, PL190_NUM_PRIO+1),
> -- 
> 1.6.3.3
> 

Thanks, applied.

Patch

diff --git a/hw/pl190.c b/hw/pl190.c
index 17c279b..75f2ba1 100644
--- a/hw/pl190.c
+++ b/hw/pl190.c
@@ -21,7 +21,6 @@  typedef struct {
     uint32_t soft_level;
     uint32_t irq_enable;
     uint32_t fiq_select;
-    uint32_t default_addr;
     uint8_t vect_control[16];
     uint32_t vect_addr[PL190_NUM_PRIO];
     /* Mask containing interrupts with higher priority than this one.  */
@@ -186,7 +185,7 @@  static void pl190_write(void *opaque, target_phys_addr_t offset, uint32_t val)
             s->priority = s->prev_prio[s->priority];
         break;
     case 13: /* DEFVECTADDR */
-        s->default_addr = val;
+        s->vect_addr[16] = val;
         break;
     case 0xc0: /* ITCR */
         if (val) {
@@ -252,7 +251,6 @@  static const VMStateDescription vmstate_pl190 = {
         VMSTATE_UINT32(soft_level, pl190_state),
         VMSTATE_UINT32(irq_enable, pl190_state),
         VMSTATE_UINT32(fiq_select, pl190_state),
-        VMSTATE_UINT32(default_addr, pl190_state),
         VMSTATE_UINT8_ARRAY(vect_control, pl190_state, 16),
         VMSTATE_UINT32_ARRAY(vect_addr, pl190_state, PL190_NUM_PRIO),
         VMSTATE_UINT32_ARRAY(prio_mask, pl190_state, PL190_NUM_PRIO+1),