Patchwork [x32] PATCH: Update address-releated patterns for x32

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Submitter H.J. Lu
Date Jan. 19, 2011, 7:21 p.m.
Message ID <20110119192135.GA27831@intel.com>
Download mbox | patch
Permalink /patch/79567/
State New
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Comments

H.J. Lu - Jan. 19, 2011, 7:21 p.m.
Hi,

I checked in this patch to update address-releated patterns for x32.


H.J.
---
commit 7d50242fa61fbce7fdf3fcbb93e56ce52017e407
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jan 19 11:18:41 2011 -0800

    Update address-releated patterns for x32.

Patch

diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index ca27084..18e1dc0 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,43 @@ 
 2011-01-19  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* config/i386/i386.md (i): Use "Ye" for SImode.
+	(g): Use "rmYe" for SImode.
+	(general_operand): Use x32_general_operand for SImode.
+	(general_szext_operand): Likewise.
+	(A): New.
+	(*movdi_internal_rex64): Use mov instead of movabs for
+	TARGET_X32.
+	(*movabs<mode>_1): Likewise.
+	(*movabs<mode>_2): Likewise.
+	(*movsi_internal): Replace 'ri' with 'rYs'.  Use A instead of
+	DI for pic_32bit_operand.
+	(*lea_general_1): Replace immediate_operand and "i" with
+	x32_lea_immediate_operand and "Ye".
+	(*lea_general_1_zext): Likewise.
+	(*lea_general_3): Likewise.
+	(*lea_general_3_zext): Likewise.
+	(*lea_general_2): Replace nonmemory_operand and "i" with
+	x32_lea_nonmemory_operand and "Ye".
+	(*lea_general_2_zext): Likewise.
+	(*subsi_1_zext): Replace general_operand wi x32_general_operand.
+	Replace "i"/"g" with "Ye"/"rmYe".
+	(*subsi_2_zext): Likewise.
+	(*subsi_3_zext): Likewise.
+	(*addsi3_carry_zext): Likewise.
+	(*subsi3_carry_zext): Likewise.
+	(*andsi_1): Likewise.
+	(*andsi_1_zext): Likewise.
+	(*andsi_2_zext): Likewise.
+	(*indirect_jump): Disabled for TARGET_X32.
+	(*tablejump_1): Likewise.
+	(*call_1_rex64): Likewise.
+	(set_got_offset_rex64): Likewise.
+	(*indirect_jump_x32): New.
+	(*tablejump_1_x32): Likewise.
+	(*call_1_rex64_x32): Likewise.
+
+2011-01-19  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* config/i386/predicates.md (x32_lea_immediate_operand): New.
 	(x32_lea_nonmemory_operand): Likewise.
 
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 1f14f5c..186926c 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -839,10 +839,10 @@ 
 (define_mode_attr r [(QI "q") (HI "r") (SI "r") (DI "r")])
 
 ;; Immediate operand constraint for integer modes.
-(define_mode_attr i [(QI "n") (HI "n") (SI "i") (DI "e")])
+(define_mode_attr i [(QI "n") (HI "n") (SI "Ye") (DI "e")])
 
 ;; General operand constraint for word modes.
-(define_mode_attr g [(QI "qmn") (HI "rmn") (SI "g") (DI "rme")])
+(define_mode_attr g [(QI "qmn") (HI "rmn") (SI "rmYe") (DI "rme")])
 
 ;; Immediate operand constraint for double integer modes.
 (define_mode_attr di [(SI "iF") (DI "e")])
@@ -854,7 +854,7 @@ 
 (define_mode_attr general_operand
 	[(QI "general_operand")
 	 (HI "general_operand")
-	 (SI "general_operand")
+	 (SI "x32_general_operand")
 	 (DI "x86_64_general_operand")
 	 (TI "x86_64_general_operand")])
 
@@ -862,7 +862,7 @@ 
 (define_mode_attr general_szext_operand
 	[(QI "general_operand")
 	 (HI "general_operand")
-	 (SI "general_operand")
+	 (SI "x32_general_operand")
 	 (DI "x86_64_szext_general_operand")])
 
 ;; Immediate operand predicate for integer modes.
@@ -942,6 +942,10 @@ 
 (include "atom.md")
 (include "core2.md")
 
+;; This mode iterator allows :A to be used for patterns that operate on
+;; address-sized quantities.  Exactly one of the two alternatives will match.
+(define_mode_iterator A [(SI "TARGET_X32") (DI "!TARGET_X32")])
+
 
 ;; Operand and operator predicates and constraints
 
@@ -2010,7 +2014,12 @@ 
       if (get_attr_mode (insn) == MODE_SI)
 	return "mov{l}\t{%k1, %k0|%k0, %k1}";
       else if (which_alternative == 2)
-	return "movabs{q}\t{%1, %0|%0, %1}";
+	{
+	  if (TARGET_X32)
+	    return "movabs{q}\t{%1, %0|%0, %1}";
+	  else
+	    return "mov{q}\t{%1, %0|%0, %1}";
+	}
       else
 	return "mov{q}\t{%1, %0|%0, %1}";
     }
@@ -2125,7 +2134,7 @@ 
   [(set (match_operand:SI 0 "nonimmediate_operand"
 			"=r,m ,*y,*y,?rm,?*y,*x,*x,?r ,m ,?*Yi,*x")
 	(match_operand:SI 1 "general_operand"
-			"g ,ri,C ,*y,*y ,rm ,C ,*x,*Yi,*x,r   ,m "))]
+			"g ,rYs,C ,*y,*y ,rm ,C ,*x,*Yi,*x,r   ,m "))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   switch (get_attr_type (insn))
@@ -2175,7 +2184,7 @@ 
 	      (const_string "sselog1")
 	    (eq_attr "alternative" "7,8,9,10,11")
 	      (const_string "ssemov")
- 	    (match_operand:DI 1 "pic_32bit_operand" "")
+ 	    (match_operand:A 1 "pic_32bit_operand" "")
 	      (const_string "lea")
 	   ]
 	   (const_string "imov")))
@@ -2335,9 +2344,17 @@ 
   [(set (mem:SWI1248x (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
 	(match_operand:SWI1248x 1 "nonmemory_operand" "a,er"))]
   "TARGET_64BIT && ix86_check_movabs (insn, 0)"
-  "@
-   movabs{<imodesuffix>}\t{%1, %P0|%P0, %1}
-   mov{<imodesuffix>}\t{%1, %a0|%a0, %1}"
+{
+  if (which_alternative == 0)
+    {
+      if (TARGET_X32)
+        return "movabs{<imodesuffix>}\t{%1, %P0|%P0, %1}";
+      else
+        return "mov{<imodesuffix>}\t{%1, %P0|%P0, %1}";
+    }
+  else
+    return "mov{<imodesuffix>}\t{%1, %a0|%a0, %1}";
+}
   [(set_attr "type" "imov")
    (set_attr "modrm" "0,*")
    (set_attr "length_address" "8,0")
@@ -2349,9 +2366,17 @@ 
   [(set (match_operand:SWI1248x 0 "register_operand" "=a,r")
         (mem:SWI1248x (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
   "TARGET_64BIT && ix86_check_movabs (insn, 1)"
-  "@
-   movabs{<imodesuffix>}\t{%P1, %0|%0, %P1}
-   mov{<imodesuffix>}\t{%a1, %0|%0, %a1}"
+{
+  if (which_alternative == 0)
+    {
+      if (TARGET_X32)
+        return "movabs{<imodesuffix>}\t{%P1, %0|%0, %P1}";
+      else
+        return "mov{<imodesuffix>}\t{%P1, %0|%0, %P1}";
+    }
+  else
+    return "mov{<imodesuffix>}\t{%a1, %0|%0, %a1}";
+}
   [(set_attr "type" "imov")
    (set_attr "modrm" "0,*")
    (set_attr "length_address" "8,0")
@@ -6452,7 +6477,7 @@ 
   [(set (match_operand 0 "register_operand" "=r")
 	(plus (plus (match_operand 1 "index_register_operand" "l")
 		    (match_operand 2 "register_operand" "r"))
-	      (match_operand 3 "immediate_operand" "i")))]
+	      (match_operand 3 "x32_lea_immediate_operand" "Ye")))]
   "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
     || (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
    && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
@@ -6485,7 +6510,7 @@ 
 	  (plus:SI (plus:SI
 		     (match_operand:SI 1 "index_register_operand" "l")
 		     (match_operand:SI 2 "register_operand" "r"))
-		   (match_operand:SI 3 "immediate_operand" "i"))))]
+		   (match_operand:SI 3 "x32_lea_immediate_operand" "Ye"))))]
   "TARGET_64BIT"
   "#"
   "&& reload_completed"
@@ -6505,7 +6530,7 @@ 
   [(set (match_operand 0 "register_operand" "=r")
 	(plus (mult (match_operand 1 "index_register_operand" "l")
 		    (match_operand 2 "const248_operand" "i"))
-	      (match_operand 3 "nonmemory_operand" "ri")))]
+	      (match_operand 3 "x32_lea_nonmemory_operand" "rYe")))]
   "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
     || (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
    && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
@@ -6536,7 +6561,7 @@ 
 	  (plus:SI (mult:SI
 		     (match_operand:SI 1 "index_register_operand" "l")
 		     (match_operand:SI 2 "const248_operand" "n"))
-		   (match_operand:SI 3 "nonmemory_operand" "ri"))))]
+		   (match_operand:SI 3 "x32_lea_nonmemory_operand" "rYe"))))]
   "TARGET_64BIT"
   "#"
   "&& reload_completed"
@@ -6556,7 +6581,7 @@ 
 	(plus (plus (mult (match_operand 1 "index_register_operand" "l")
 			  (match_operand 2 "const248_operand" "i"))
 		    (match_operand 3 "register_operand" "r"))
-	      (match_operand 4 "immediate_operand" "i")))]
+	      (match_operand 4 "x32_lea_immediate_operand" "Ye")))]
   "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
     || (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
    && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
@@ -6592,7 +6617,7 @@ 
 		       (match_operand:SI 1 "index_register_operand" "l")
 		       (match_operand:SI 2 "const248_operand" "n"))
 		     (match_operand:SI 3 "register_operand" "r"))
-		   (match_operand:SI 4 "immediate_operand" "i"))))]
+		   (match_operand:SI 4 "x32_lea_immediate_operand" "Ye"))))]
   "TARGET_64BIT"
   "#"
   "&& reload_completed"
@@ -6655,7 +6680,7 @@ 
   [(set (match_operand:DI 0 "register_operand" "=r")
 	(zero_extend:DI
 	  (minus:SI (match_operand:SI 1 "register_operand" "0")
-		    (match_operand:SI 2 "general_operand" "g"))))
+		    (match_operand:SI 2 "x32_general_operand" "rmYe"))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
   "sub{l}\t{%2, %k0|%k0, %2}"
@@ -6692,7 +6717,7 @@ 
   [(set (reg FLAGS_REG)
 	(compare
 	  (minus:SI (match_operand:SI 1 "register_operand" "0")
-		    (match_operand:SI 2 "general_operand" "g"))
+		    (match_operand:SI 2 "x32_general_operand" "rmYe"))
 	  (const_int 0)))
    (set (match_operand:DI 0 "register_operand" "=r")
 	(zero_extend:DI
@@ -6719,7 +6744,7 @@ 
 (define_insn "*subsi_3_zext"
   [(set (reg FLAGS_REG)
 	(compare (match_operand:SI 1 "register_operand" "0")
-		 (match_operand:SI 2 "general_operand" "g")))
+		 (match_operand:SI 2 "x32_general_operand" "rmYe")))
    (set (match_operand:DI 0 "register_operand" "=r")
 	(zero_extend:DI
 	  (minus:SI (match_dup 1)
@@ -6766,7 +6791,7 @@ 
 	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
 		   (plus:SI (match_operator 3 "ix86_carry_flag_operator"
 			     [(reg FLAGS_REG) (const_int 0)])
-			    (match_operand:SI 2 "general_operand" "g")))))
+			    (match_operand:SI 2 "x32_general_operand" "rmYe")))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
   "adc{l}\t{%2, %k0|%k0, %2}"
@@ -6781,7 +6806,7 @@ 
 	  (minus:SI (match_operand:SI 1 "register_operand" "0")
 		    (plus:SI (match_operator 3 "ix86_carry_flag_operator"
 			      [(reg FLAGS_REG) (const_int 0)])
-			     (match_operand:SI 2 "general_operand" "g")))))
+			     (match_operand:SI 2 "x32_general_operand" "rmYe")))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
   "sbb{l}\t{%2, %k0|%k0, %2}"
@@ -7904,7 +7929,7 @@ 
 (define_insn "*andsi_1"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r,r")
 	(and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,qm")
-		(match_operand:SI 2 "general_operand" "ri,rm,L")))
+		(match_operand:SI 2 "x32_general_operand" "rYe,rm,L")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (AND, SImode, operands)"
 {
@@ -7951,7 +7976,7 @@ 
   [(set (match_operand:DI 0 "register_operand" "=r")
 	(zero_extend:DI
 	  (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
-		  (match_operand:SI 2 "general_operand" "g"))))
+		  (match_operand:SI 2 "x32_general_operand" "rmYe"))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && ix86_binary_operator_ok (AND, SImode, operands)"
   "and{l}\t{%2, %k0|%k0, %2}"
@@ -8114,7 +8139,7 @@ 
   [(set (reg FLAGS_REG)
 	(compare (and:SI
 		  (match_operand:SI 1 "nonimmediate_operand" "%0")
-		  (match_operand:SI 2 "general_operand" "g"))
+		  (match_operand:SI 2 "x32_general_operand" "rmYe"))
 		 (const_int 0)))
    (set (match_operand:DI 0 "register_operand" "=r")
 	(zero_extend:DI (and:SI (match_dup 1) (match_dup 2))))]
@@ -11148,7 +11173,14 @@ 
 
 (define_insn "*indirect_jump"
   [(set (pc) (match_operand:P 0 "nonimmediate_operand" "rm"))]
-  ""
+  "!TARGET_X32"
+  "jmp\t%A0"
+  [(set_attr "type" "ibr")
+   (set_attr "length_immediate" "0")])
+
+(define_insn "*indirect_jump_x32"
+  [(set (pc) (match_operand:P 0 "register_operand" "r"))]
+  "TARGET_X32"
   "jmp\t%A0"
   [(set_attr "type" "ibr")
    (set_attr "length_immediate" "0")])
@@ -11194,7 +11226,15 @@ 
 (define_insn "*tablejump_1"
   [(set (pc) (match_operand:P 0 "nonimmediate_operand" "rm"))
    (use (label_ref (match_operand 1 "" "")))]
-  ""
+  "!TARGET_X32"
+  "jmp\t%A0"
+  [(set_attr "type" "ibr")
+   (set_attr "length_immediate" "0")])
+
+(define_insn "*tablejump_1_x32"
+  [(set (pc) (match_operand:P 0 "register_operand" "r"))
+   (use (label_ref (match_operand 1 "" "")))]
+  "TARGET_X32"
   "jmp\t%A0"
   [(set_attr "type" "ibr")
    (set_attr "length_immediate" "0")])
@@ -11449,8 +11489,19 @@ 
 (define_insn "*call_1_rex64"
   [(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rsm"))
 	 (match_operand 1 "" ""))]
-  "TARGET_64BIT && !SIBLING_CALL_P (insn)
+  "TARGET_LP64 && !SIBLING_CALL_P (insn)
    && ix86_cmodel != CM_LARGE && ix86_cmodel != CM_LARGE_PIC"
+{
+  if (constant_call_address_operand (operands[0], Pmode))
+    return "call\t%P0";
+  return "call\t%A0";
+}
+  [(set_attr "type" "call")])
+
+(define_insn "*call_1_rex64_x32"
+  [(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rs"))
+	 (match_operand 1 "" ""))]
+  "TARGET_X32 && !SIBLING_CALL_P (insn)"
   { return ix86_output_call_insn (insn, operands[0], 0); }
   [(set_attr "type" "call")])
 
@@ -11812,7 +11863,7 @@ 
 	(unspec:DI
 	  [(label_ref (match_operand 1 "" ""))]
 	  UNSPEC_SET_GOT_OFFSET))]
-  "TARGET_64BIT"
+  "TARGET_LP64"
   "movabs{q}\t{$_GLOBAL_OFFSET_TABLE_-%l1, %0|%0, OFFSET FLAT:_GLOBAL_OFFSET_TABLE_-%l1}"
   [(set_attr "type" "imov")
    (set_attr "length_immediate" "0")