From patchwork Wed Jan 19 14:48:10 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 79479 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id D80E5B70B3 for ; Thu, 20 Jan 2011 01:48:20 +1100 (EST) Received: (qmail 4224 invoked by alias); 19 Jan 2011 14:48:18 -0000 Received: (qmail 4203 invoked by uid 22791); 19 Jan 2011 14:48:16 -0000 X-SWARE-Spam-Status: No, hits=-4.2 required=5.0 tests=AWL, BAYES_00, NO_DNS_FOR_FROM, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mga01.intel.com (HELO mga01.intel.com) (192.55.52.88) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 19 Jan 2011 14:48:12 +0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 19 Jan 2011 06:48:10 -0800 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([10.3.194.135]) by fmsmga002.fm.intel.com with ESMTP; 19 Jan 2011 06:48:10 -0800 Received: by gnu-6.sc.intel.com (Postfix, from userid 500) id 81CB9180A62; Wed, 19 Jan 2011 06:48:10 -0800 (PST) Date: Wed, 19 Jan 2011 06:48:10 -0800 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Subject: [x32] PATCH: Add x32 constraints and predicates Message-ID: <20110119144810.GA32126@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org For x32, many address related operations on SImode patterns have similar restrictions as 64bit, especially for PIC. This patch adds x32 constraints and predicates. H.J. --- commit 92f9fa87dc8fa8b5e7033631991038b014581268 Author: H.J. Lu Date: Wed Jan 19 06:42:31 2011 -0800 Add x32 constraints and predicates. diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32 index 45a63a7..fb31436 100644 --- a/gcc/ChangeLog.x32 +++ b/gcc/ChangeLog.x32 @@ -1,5 +1,15 @@ 2011-01-19 H.J. Lu + * config/i386/constraints.md (Ys): New. + (Ye): Likewise. + + * config/i386/predicates.md (x86_64_movabs_operand): Don't + allow nonmemory_operand for TARGET_X32. + (x32_store_immediate_operand): New. + (x32_general_operand): Likewise. + +2011-01-19 H.J. Lu + * config/linux.h (UCLIBC_DYNAMIC_LINKERX32): New. (BIONIC_DYNAMIC_LINKERX32): Likewise. (LINUX_DYNAMIC_LINKERX32): Likewise. diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md index 89722bb..16caa75 100644 --- a/gcc/config/i386/constraints.md +++ b/gcc/config/i386/constraints.md @@ -105,6 +105,22 @@ "TARGET_MMX && TARGET_INTER_UNIT_MOVES ? MMX_REGS : NO_REGS" "@internal Any MMX register, when inter-unit moves are enabled.") +;; Constant constraints. +;; We also use the Y prefix to denote constant constraints: +;; s Immediate constant for x32 store +;; e Immediate constant for x32 + +(define_constraint "Ys" + "Immediate constant for x32 store." + (match_operand 0 "x32_store_immediate_operand")) + +(define_constraint "Ye" + "Immediate constant for x32." + (if_then_else (and (match_test "TARGET_X32") + (match_test "flag_pic")) + (match_operand 0 "x86_64_immediate_operand") + (match_operand 0 "immediate_operand"))) + ;; Integer constant constraints. (define_constraint "I" "Integer constant in the range 0 @dots{} 31, for 32-bit shifts." diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 986856b..3d06bd3 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -379,7 +379,7 @@ ;; Return true if OP is nonmemory operand acceptable by movabs patterns. (define_predicate "x86_64_movabs_operand" - (if_then_else (match_test "!TARGET_64BIT || !flag_pic") + (if_then_else (match_test "!TARGET_64BIT || (!flag_pic && !TARGET_X32)") (match_operand 0 "nonmemory_operand") (ior (match_operand 0 "register_operand") (and (match_operand 0 "const_double_operand") @@ -1229,3 +1229,17 @@ return false; return true; }) + +;; Return true when a constant operand can be stored into memory for x32. +(define_predicate "x32_store_immediate_operand" + (match_operand 0 "immediate_operand") +{ + return !TARGET_X32 || !pic_32bit_operand (op, mode); +}) + +;; Return nonzero if OP is general operand representable on x32. +(define_predicate "x32_general_operand" + (if_then_else (and (match_test "TARGET_X32") + (match_test "flag_pic")) + (match_operand 0 "x86_64_general_operand") + (match_operand 0 "general_operand")))