Patchwork [x32] PATCH: Add x32 constraints and predicates

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Submitter H.J. Lu
Date Jan. 19, 2011, 2:48 p.m.
Message ID <20110119144810.GA32126@intel.com>
Download mbox | patch
Permalink /patch/79479/
State New
Headers show

Comments

H.J. Lu - Jan. 19, 2011, 2:48 p.m.
For x32, many address related operations on SImode patterns have similar
restrictions as 64bit, especially for PIC.  This patch adds x32
constraints and predicates.

H.J.
---
commit 92f9fa87dc8fa8b5e7033631991038b014581268
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jan 19 06:42:31 2011 -0800

    Add x32 constraints and predicates.

Patch

diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index 45a63a7..fb31436 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,15 @@ 
 2011-01-19  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* config/i386/constraints.md (Ys): New.
+	(Ye): Likewise.
+
+	* config/i386/predicates.md (x86_64_movabs_operand): Don't
+	allow nonmemory_operand for TARGET_X32.
+	(x32_store_immediate_operand): New.
+	(x32_general_operand): Likewise.
+
+2011-01-19  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* config/linux.h (UCLIBC_DYNAMIC_LINKERX32): New.
 	(BIONIC_DYNAMIC_LINKERX32): Likewise.
 	(LINUX_DYNAMIC_LINKERX32): Likewise.
diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
index 89722bb..16caa75 100644
--- a/gcc/config/i386/constraints.md
+++ b/gcc/config/i386/constraints.md
@@ -105,6 +105,22 @@ 
  "TARGET_MMX && TARGET_INTER_UNIT_MOVES ? MMX_REGS : NO_REGS"
  "@internal Any MMX register, when inter-unit moves are enabled.")
 
+;; Constant constraints.
+;; We also use the Y prefix to denote constant constraints:
+;;  s	Immediate constant for x32 store
+;;  e	Immediate constant for x32
+
+(define_constraint "Ys"
+  "Immediate constant for x32 store."
+  (match_operand 0 "x32_store_immediate_operand"))
+
+(define_constraint "Ye"
+  "Immediate constant for x32."
+  (if_then_else (and (match_test "TARGET_X32")
+		     (match_test "flag_pic"))
+    (match_operand 0 "x86_64_immediate_operand")
+  (match_operand 0 "immediate_operand")))
+
 ;; Integer constant constraints.
 (define_constraint "I"
   "Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 986856b..3d06bd3 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -379,7 +379,7 @@ 
 
 ;; Return true if OP is nonmemory operand acceptable by movabs patterns.
 (define_predicate "x86_64_movabs_operand"
-  (if_then_else (match_test "!TARGET_64BIT || !flag_pic")
+  (if_then_else (match_test "!TARGET_64BIT || (!flag_pic && !TARGET_X32)")
     (match_operand 0 "nonmemory_operand")
     (ior (match_operand 0 "register_operand")
 	 (and (match_operand 0 "const_double_operand")
@@ -1229,3 +1229,17 @@ 
       return false;
   return true;
 })
+
+;; Return true when a constant operand can be stored into memory for x32.
+(define_predicate "x32_store_immediate_operand"
+  (match_operand 0 "immediate_operand")
+{
+  return !TARGET_X32 || !pic_32bit_operand (op, mode);
+})
+
+;; Return nonzero if OP is general operand representable on x32.
+(define_predicate "x32_general_operand"
+  (if_then_else (and (match_test "TARGET_X32")
+		     (match_test "flag_pic"))
+    (match_operand 0 "x86_64_general_operand")
+    (match_operand 0 "general_operand")))