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[04/10] acpi: dbg2: add SBBR compliance tests

Message ID 1500963057-4225-5-git-send-email-Sakar.Arora@arm.com
State Superseded
Headers show

Commit Message

Sakar Arora July 25, 2017, 6:10 a.m. UTC 
From: Rajat Goyal <Rajat.Goyal@arm.com>

Server Base Boot Requirements (SBBR) specification is intended for SBSA-
compliant 64-bit ARMv8 servers.
It defines the base firmware requirements for out-of-box support of any
ARM SBSA-compatible Operating System or hypervisor.
The requirements in this specification are expected to be minimal yet
complete for booting a multi-core ARMv8 server platform, while leaving
plenty of room for OEM or ODM innovations and design details.
For more information, download the SBBR specification here:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0044b/index.html

This change introduces test cases as per SBBR specification to dbg2
table.

Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Signed-off-by: Rajat Goyal <Rajat.Goyal@arm.com>
---
 src/acpi/dbg2/dbg2.c | 43 ++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 40 insertions(+), 3 deletions(-)

Comments

Alex Hung Aug. 3, 2017, 3:51 a.m. UTC | #1 
On 2017-07-24 11:10 PM, Sakar Arora wrote:
> From: Rajat Goyal <Rajat.Goyal@arm.com>
> 
> Server Base Boot Requirements (SBBR) specification is intended for SBSA-
> compliant 64-bit ARMv8 servers.
> It defines the base firmware requirements for out-of-box support of any
> ARM SBSA-compatible Operating System or hypervisor.
> The requirements in this specification are expected to be minimal yet
> complete for booting a multi-core ARMv8 server platform, while leaving
> plenty of room for OEM or ODM innovations and design details.
> For more information, download the SBBR specification here:
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0044b/index.html
> 
> This change introduces test cases as per SBBR specification to dbg2
> table.
> 
> Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
> Signed-off-by: Rajat Goyal <Rajat.Goyal@arm.com>
> ---
>   src/acpi/dbg2/dbg2.c | 43 ++++++++++++++++++++++++++++++++++++++++---
>   1 file changed, 40 insertions(+), 3 deletions(-)
> 
> diff --git a/src/acpi/dbg2/dbg2.c b/src/acpi/dbg2/dbg2.c
> index e6f6f09..9aa25c2 100644
> --- a/src/acpi/dbg2/dbg2.c
> +++ b/src/acpi/dbg2/dbg2.c
> @@ -39,10 +39,46 @@ static int dbg2_init(fwts_framework *fw)
>   		return FWTS_ERROR;
>   	}
>   	if (table == NULL || (table && table->length == 0)) {
> -		fwts_log_error(fw, "ACPI DBG2 table does not exist, skipping test");
> -		return FWTS_SKIP;
> +		if (fw->flags & FWTS_FLAG_TEST_SBBR) {
> +			fwts_log_error(fw, "ACPI DBG2 table does not exist");
> +			return FWTS_ERROR;
> +		} else {
> +			fwts_log_error(fw, "ACPI DBG2 table does not exist, skipping test");
> +			return FWTS_SKIP;
> +		}
> +	}
> +
> +	return FWTS_OK;
> +}
> +
> +static int dbg2_sbsa_uart_test(fwts_framework *fw)
I prefer the new function named dbg2_test2.
> +{
> +	if (!(fw->flags & FWTS_FLAG_TEST_SBBR))
> +		return FWTS_OK;
> +
> +	uint32_t i;

Please put the declaration to the beginning of the function.

> +
> +	fwts_acpi_table_dbg2 *dbg2 = (fwts_acpi_table_dbg2 *)table->data;
> +	fwts_acpi_table_dbg2_info *info;
> +
> +	const int SBBR_DBG2_PORT_SERIAL = 0x8000;
> +	const int SBBR_DBG2_ARM_SBSA_UART = 0x000E;

How about using #define macro at the top of the file?

> +
> +	info = (fwts_acpi_table_dbg2_info *)(table->data + dbg2->info_offset);
> +
> +	for (i = 0; i < dbg2->info_count; i++) {
> +		if( (info->port_type    == SBBR_DBG2_PORT_SERIAL  ) &&
> +			(info->port_subtype == SBBR_DBG2_ARM_SBSA_UART)    )
> +		{
> +			fwts_passed(fw, "DBG2 provides a standard serial debug port and describes ARM SBSA Generic UART");
> +			return FWTS_OK;
> +		}
> +
> +		/* ..and onto the next info structure .. */
> +		info = (fwts_acpi_table_dbg2_info *)((uint8_t *)info + info->length);
>   	}

Please also fix format problems as commented in previous patches.
>   
> +	fwts_failed(fw, LOG_LEVEL_CRITICAL, "dbg2_sbsa_uart:", "DBG2 provides a non standard debug port");
>   	return FWTS_OK;
>   }
>   
> @@ -342,6 +378,7 @@ done:
>   }
>   
>   static fwts_framework_minor_test dbg2_tests[] = {
> +	{ dbg2_sbsa_uart_test, "DBG2 ARM SBSA Generic UART test," },
>   	{ dbg2_test1, "DBG2 (Debug Port Table 2) test." },

I prefer the new function named dbg2_test2 and put below dbg2_test1 
similar to other tests.

>   	{ NULL, NULL }
>   };
> @@ -352,6 +389,6 @@ static fwts_framework_ops dbg2_ops = {
>   	.minor_tests = dbg2_tests
>   };
>   
> -FWTS_REGISTER("dbg2", &dbg2_ops, FWTS_TEST_ANYTIME, FWTS_FLAG_BATCH | FWTS_FLAG_TEST_ACPI)
> +FWTS_REGISTER("dbg2", &dbg2_ops, FWTS_TEST_ANYTIME, FWTS_FLAG_BATCH | FWTS_FLAG_TEST_ACPI | FWTS_FLAG_TEST_SBBR)
>   
>   #endif
>
diff mbox

Patch

diff --git a/src/acpi/dbg2/dbg2.c b/src/acpi/dbg2/dbg2.c
index e6f6f09..9aa25c2 100644
--- a/src/acpi/dbg2/dbg2.c
+++ b/src/acpi/dbg2/dbg2.c
@@ -39,10 +39,46 @@  static int dbg2_init(fwts_framework *fw)
 		return FWTS_ERROR;
 	}
 	if (table == NULL || (table && table->length == 0)) {
-		fwts_log_error(fw, "ACPI DBG2 table does not exist, skipping test");
-		return FWTS_SKIP;
+		if (fw->flags & FWTS_FLAG_TEST_SBBR) {
+			fwts_log_error(fw, "ACPI DBG2 table does not exist");
+			return FWTS_ERROR;
+		} else {
+			fwts_log_error(fw, "ACPI DBG2 table does not exist, skipping test");
+			return FWTS_SKIP;
+		}
+	}
+
+	return FWTS_OK;
+}
+
+static int dbg2_sbsa_uart_test(fwts_framework *fw)
+{
+	if (!(fw->flags & FWTS_FLAG_TEST_SBBR))
+		return FWTS_OK;
+
+	uint32_t i;
+
+	fwts_acpi_table_dbg2 *dbg2 = (fwts_acpi_table_dbg2 *)table->data;
+	fwts_acpi_table_dbg2_info *info;
+
+	const int SBBR_DBG2_PORT_SERIAL = 0x8000;
+	const int SBBR_DBG2_ARM_SBSA_UART = 0x000E;
+
+	info = (fwts_acpi_table_dbg2_info *)(table->data + dbg2->info_offset);
+
+	for (i = 0; i < dbg2->info_count; i++) {
+		if( (info->port_type    == SBBR_DBG2_PORT_SERIAL  ) &&
+			(info->port_subtype == SBBR_DBG2_ARM_SBSA_UART)    )
+		{
+			fwts_passed(fw, "DBG2 provides a standard serial debug port and describes ARM SBSA Generic UART");
+			return FWTS_OK;
+		}
+
+		/* ..and onto the next info structure .. */
+		info = (fwts_acpi_table_dbg2_info *)((uint8_t *)info + info->length);
 	}
 
+	fwts_failed(fw, LOG_LEVEL_CRITICAL, "dbg2_sbsa_uart:", "DBG2 provides a non standard debug port");
 	return FWTS_OK;
 }
 
@@ -342,6 +378,7 @@  done:
 }
 
 static fwts_framework_minor_test dbg2_tests[] = {
+	{ dbg2_sbsa_uart_test, "DBG2 ARM SBSA Generic UART test," },
 	{ dbg2_test1, "DBG2 (Debug Port Table 2) test." },
 	{ NULL, NULL }
 };
@@ -352,6 +389,6 @@  static fwts_framework_ops dbg2_ops = {
 	.minor_tests = dbg2_tests
 };
 
-FWTS_REGISTER("dbg2", &dbg2_ops, FWTS_TEST_ANYTIME, FWTS_FLAG_BATCH | FWTS_FLAG_TEST_ACPI)
+FWTS_REGISTER("dbg2", &dbg2_ops, FWTS_TEST_ANYTIME, FWTS_FLAG_BATCH | FWTS_FLAG_TEST_ACPI | FWTS_FLAG_TEST_SBBR)
 
 #endif