[U-Boot,V2,2/2] SPI: mxc_spi: add SPI clock calculation and setup to the driver

Submitted by Stefano Babic on Jan. 18, 2011, 11:22 a.m.

Details

Message ID 1295349749-32406-1-git-send-email-sbabic@denx.de
State Superseded
Headers show

Commit Message

Stefano Babic Jan. 18, 2011, 11:22 a.m.
From: Anatolij Gustschin <agust@denx.de>

The MXC SPI driver didn't calculate the SPI clock up to
now and just highest possible divider 512 for DATA
RATE in the control register. This results in very low
transfer rates.

The patch adds code to calculate and setup the SPI clock
frequency for transfers.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
---
Changes:

The patch is rebased on the current patches already sent for this driver
(support for MX35). Tested on a MX35 board.

Modified commit message as suggested by Anatolij

 drivers/spi/mxc_spi.c |   24 +++++++++++++++++++++++-
 1 files changed, 23 insertions(+), 1 deletions(-)

Comments

Sergei Shtylyov Jan. 18, 2011, 3:37 p.m.
Hello.

Stefano Babic wrote:

> From: Anatolij Gustschin <agust@denx.de>

> The MXC SPI driver didn't calculate the SPI clock up to
> now and just highest possible divider 512 for DATA
               ^
    I think "used" shouldn't have been ommitted here.

> RATE in the control register. This results in very low
> transfer rates.

> The patch adds code to calculate and setup the SPI clock
> frequency for transfers.

> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> Signed-off-by: Stefano Babic <sbabic@denx.de>

WBR, Sergei
Stefano Babic Jan. 20, 2011, 8:11 a.m.
On 01/18/2011 04:37 PM, Sergei Shtylyov wrote:
> Hello.
> 
> Stefano Babic wrote:
> 
>> From: Anatolij Gustschin <agust@denx.de>
> 
>> The MXC SPI driver didn't calculate the SPI clock up to
>> now and just highest possible divider 512 for DATA
>               ^
>    I think "used" shouldn't have been ommitted here.
> 

Right. I fix it.

Best regards,
Stefano Babic

Patch hide | download patch | download mbox

diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 0e42d41..32be7b0 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -71,6 +71,7 @@  static unsigned long spi_bases[] = {
 };
 
 #define spi_cfg	spi_cfg_mx3
+#define mxc_get_clock(x)	mx31_get_ipg_clk()
 
 #elif defined(CONFIG_MX51)
 #include <asm/arch/imx-regs.h>
@@ -201,15 +202,36 @@  void spi_cs_deactivate(struct spi_slave *slave)
 			      !(mxcs->ss_pol));
 }
 
+u32 get_cspi_div(u32 div)
+{
+	int i;
+
+	for (i = 0; i < 8; i++) {
+		if (div <= (4 << i))
+			return i;
+	}
+	return i;
+}
+
 #if defined(CONFIG_MX31) || defined(CONFIG_MX35)
 static s32 spi_cfg_mx3(struct mxc_spi_slave *mxcs, unsigned int cs,
 		unsigned int max_hz, unsigned int mode)
 {
 	unsigned int ctrl_reg;
+	u32 clk_src;
+	u32 div;
+
+	clk_src = mxc_get_clock(MXC_CSPI_CLK);
+
+	div = clk_src / max_hz;
+	div = get_cspi_div(div);
+
+	debug("clk %d Hz, div %d, real clk %d Hz\n",
+		max_hz, div, clk_src / (4 << div));
 
 	ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) |
 		MXC_CSPICTRL_BITCOUNT(MXC_CSPICTRL_MAXBITS) |
-		MXC_CSPICTRL_DATARATE(7) | /* FIXME: calculate data rate */
+		MXC_CSPICTRL_DATARATE(div) |
 		MXC_CSPICTRL_EN |
 #ifdef CONFIG_MX35
 		MXC_CSPICTRL_SSCTL |