[kvm-unit-tests,v2] powerpc/sprs: Test POWER9 specific registers

Message ID 1500895581-16713-1-git-send-email-thuth@redhat.com
State New
Headers show

Commit Message

Thomas Huth July 24, 2017, 11:26 a.m.
Most of the SPRS are the same as on POWER8, so we can re-use
the PowerISA 2.07 functions and simply amend the additional
registers afterwards.

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 v2:
 - Removed GSR (SPR 158) since it is a write-only register
 - Removed LMRR (813) and LMSER (814) since they have been removed
   in PowerISA 3.0 B
 - Added TIDR (144) which is a new register in PowerISA 3.0 B

 BTW: In case somebody got some spare time and wants to increase
 their patch count: Seems like TIDR (144) and PSSCR (823) are
 currently not migrated right.

 powerpc/sprs.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

Comments

Laurent Vivier July 27, 2017, 6:36 a.m. | #1
On 24/07/2017 13:26, Thomas Huth wrote:
> Most of the SPRS are the same as on POWER8, so we can re-use
> the PowerISA 2.07 functions and simply amend the additional
> registers afterwards.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>

Reviewed-by: Laurent Vivier <lvivier@redhat.com>

> ---
>  v2:
>  - Removed GSR (SPR 158) since it is a write-only register
>  - Removed LMRR (813) and LMSER (814) since they have been removed
>    in PowerISA 3.0 B
>  - Added TIDR (144) which is a new register in PowerISA 3.0 B
> 
>  BTW: In case somebody got some spare time and wants to increase
>  their patch count: Seems like TIDR (144) and PSSCR (823) are
>  currently not migrated right.
> 
>  powerpc/sprs.c | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/powerpc/sprs.c b/powerpc/sprs.c
> index 39644fa..c02bcc9 100644
> --- a/powerpc/sprs.c
> +++ b/powerpc/sprs.c
> @@ -126,6 +126,15 @@ static void set_sprs_book3s_207(uint64_t val)
>  	mtspr(815, val);	/* TAR */
>  }
>  
> +/* SPRs from PowerISA 3.00 Book III */
> +static void set_sprs_book3s_300(uint64_t val)
> +{
> +	set_sprs_book3s_207(val);
> +	mtspr(48, val);		/* PIDR */
> +	mtspr(144, val);	/* TIDR */
> +	mtspr(823, val);	/* PSSCR */
> +}
> +
>  static void set_sprs(uint64_t val)
>  {
>  	uint32_t pvr = mfspr(287);	/* Processor Version Register */
> @@ -143,6 +152,9 @@ static void set_sprs(uint64_t val)
>  	case 0x4d:			/* POWER8 */
>  		set_sprs_book3s_207(val);
>  		break;
> +	case 0x4e:			/* POWER9 */
> +		set_sprs_book3s_300(val);
> +		break;
>  	default:
>  		puts("Warning: Unknown processor version!\n");
>  	}
> @@ -218,6 +230,14 @@ static void get_sprs_book3s_207(uint64_t *v)
>  	v[815] = mfspr(815);	/* TAR */
>  }
>  
> +static void get_sprs_book3s_300(uint64_t *v)
> +{
> +	get_sprs_book3s_207(v);
> +	v[48] = mfspr(48);	/* PIDR */
> +	v[144] = mfspr(144);	/* TIDR */
> +	v[823] = mfspr(823);	/* PSSCR */
> +}
> +
>  static void get_sprs(uint64_t *v)
>  {
>  	uint32_t pvr = mfspr(287);	/* Processor Version Register */
> @@ -235,6 +255,9 @@ static void get_sprs(uint64_t *v)
>  	case 0x4d:			/* POWER8 */
>  		get_sprs_book3s_207(v);
>  		break;
> +	case 0x4e:			/* POWER9 */
> +		get_sprs_book3s_300(v);
> +		break;
>  	}
>  }
>  
> 

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Radim Krčmář Aug. 2, 2017, 8:39 p.m. | #2
2017-07-24 13:26+0200, Thomas Huth:
> Most of the SPRS are the same as on POWER8, so we can re-use
> the PowerISA 2.07 functions and simply amend the additional
> registers afterwards.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---

Applied, thanks.
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Patch

diff --git a/powerpc/sprs.c b/powerpc/sprs.c
index 39644fa..c02bcc9 100644
--- a/powerpc/sprs.c
+++ b/powerpc/sprs.c
@@ -126,6 +126,15 @@  static void set_sprs_book3s_207(uint64_t val)
 	mtspr(815, val);	/* TAR */
 }
 
+/* SPRs from PowerISA 3.00 Book III */
+static void set_sprs_book3s_300(uint64_t val)
+{
+	set_sprs_book3s_207(val);
+	mtspr(48, val);		/* PIDR */
+	mtspr(144, val);	/* TIDR */
+	mtspr(823, val);	/* PSSCR */
+}
+
 static void set_sprs(uint64_t val)
 {
 	uint32_t pvr = mfspr(287);	/* Processor Version Register */
@@ -143,6 +152,9 @@  static void set_sprs(uint64_t val)
 	case 0x4d:			/* POWER8 */
 		set_sprs_book3s_207(val);
 		break;
+	case 0x4e:			/* POWER9 */
+		set_sprs_book3s_300(val);
+		break;
 	default:
 		puts("Warning: Unknown processor version!\n");
 	}
@@ -218,6 +230,14 @@  static void get_sprs_book3s_207(uint64_t *v)
 	v[815] = mfspr(815);	/* TAR */
 }
 
+static void get_sprs_book3s_300(uint64_t *v)
+{
+	get_sprs_book3s_207(v);
+	v[48] = mfspr(48);	/* PIDR */
+	v[144] = mfspr(144);	/* TIDR */
+	v[823] = mfspr(823);	/* PSSCR */
+}
+
 static void get_sprs(uint64_t *v)
 {
 	uint32_t pvr = mfspr(287);	/* Processor Version Register */
@@ -235,6 +255,9 @@  static void get_sprs(uint64_t *v)
 	case 0x4d:			/* POWER8 */
 		get_sprs_book3s_207(v);
 		break;
+	case 0x4e:			/* POWER9 */
+		get_sprs_book3s_300(v);
+		break;
 	}
 }