diff mbox

[i386] : fix PR80569, "shrx" instruction generated in 16-bit mode

Message ID CAFULd4a7Zmn-9r=-i9tqo27sVzrq9unwJ79wRmuJXur=7sAvvQ@mail.gmail.com
State New
Headers show

Commit Message

Uros Bizjak July 23, 2017, 10:31 a.m. UTC 
Hello!

We have to prevent BMI, BMI2 and TBM instructions in -m16 mode.

2017-07-23  Uros Bizjak  <ubizjak@gmail.com>

    PR target/80569
    * config/i386/i386.c (ix86_option_override_internal): Disable
    BMI, BMI2 and TBM instructions for -m16.

testsuite/ChangeLog:

2017-07-23  Uros Bizjak  <ubizjak@gmail.com>

    PR target/80569
    * gcc.target/i386/pr80569.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline, will backport to release branches.

Uros.
diff mbox

Patch

Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c	(revision 250457)
+++ config/i386/i386.c	(working copy)
@@ -6284,6 +6284,12 @@  ix86_option_override_internal (bool main_args_p,
     opts->x_ix86_isa_flags
       |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit;
 
+  /* Disable BMI, BMI2 and TBM instructions for -m16.  */
+  if (TARGET_16BIT_P(opts->x_ix86_isa_flags))
+    opts->x_ix86_isa_flags
+      &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM)
+	   & ~opts->x_ix86_isa_flags_explicit);
+
   /* Validate -mpreferred-stack-boundary= value or default it to
      PREFERRED_STACK_BOUNDARY_DEFAULT.  */
   ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT;
Index: testsuite/gcc.target/i386/pr80569.c
===================================================================
--- testsuite/gcc.target/i386/pr80569.c	(nonexistent)
+++ testsuite/gcc.target/i386/pr80569.c	(working copy)
@@ -0,0 +1,9 @@ 
+/* PR target/80569 */
+/* { dg-do assemble } */
+/* { dg-options "-O2 -m16 -march=haswell" } */
+
+void load_kernel(void *setup_addr)
+{
+    unsigned int seg = (unsigned int)setup_addr >> 4;
+    asm("movl %0, %%es" : : "r"(seg));
+}