Message ID | 59731339.3050906@oracle.com |
---|---|
State | RFC |
Delegated to: | David Miller |
Headers | show |
On Sat, Jul 22, 2017 at 02:26:25PM +0530, Allen wrote: > Sam/David, > > > >It is way better than the hardcoded values. > >If the vales have any sort of name in the sparc specs > >the values shall be prefixed with this. > >Otherwise something like > >CPU_ID_xxx > > > >And maybe add an intro comment like this: > >/* following CPU_ID_xxx constants are used to identify the > > * CPU type in the setup phase (see xxx.S) > >*/ > > > > Here's a quick diff. Let me know if this looks good to you guys. > I'll send out the patch. I have tested this on a T4. Acked-by: Sam Ravnborg <sam@ravnborg.org> -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
From: Allen <allen.pais@oracle.com> Date: Sat, 22 Jul 2017 14:26:25 +0530 > Sam/David, >> >> It is way better than the hardcoded values. >> If the vales have any sort of name in the sparc specs >> the values shall be prefixed with this. >> Otherwise something like >> CPU_ID_xxx >> >> And maybe add an intro comment like this: >> /* following CPU_ID_xxx constants are used to identify the >> * CPU type in the setup phase (see xxx.S) >> */ >> > > Here's a quick diff. Let me know if this looks good to you guys. I'll > send out the patch. I have tested this on a T4. Acked-by: David S. Miller <davem@davemloft.net> -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/sparc/include/asm/spitfire.h b/arch/sparc/include/asm/spitfire.h index 1d8321c..1b1286d 100644 --- a/arch/sparc/include/asm/spitfire.h +++ b/arch/sparc/include/asm/spitfire.h @@ -47,10 +47,26 @@ +/* + * The following CPU_ID_xxx constants are used + * to identify the CPU type in the setup phase + * (see head_64.S) + */ +#define CPU_ID_NIAGARA1 ('1') +#define CPU_ID_NIAGARA2 ('2') +#define CPU_ID_NIAGARA3 ('3') +#define CPU_ID_NIAGARA4 ('4') +#define CPU_ID_NIAGARA5 ('5') +#define CPU_ID_M6 ('6') +#define CPU_ID_M7 ('7') +#define CPU_ID_M8 ('8') +#define CPU_ID_SONOMA1 ('N') + diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S index 41a4073..78e0211 100644 --- a/arch/sparc/kernel/head_64.S +++ b/arch/sparc/kernel/head_64.S @@ -424,22 +424,25 @@ EXPORT_SYMBOL(sun4v_chip_type) nop 70: ldub [%g1 + 7], %g2 - cmp %g2, '3' + cmp %g2, CPU_ID_NIAGARA3 be,pt %xcc, 5f mov SUN4V_CHIP_NIAGARA3, %g4 - cmp %g2, '4' + cmp %g2, CPU_ID_NIAGARA4