Patchwork [U-Boot] mpc83xx:fix pcie configuration space read/write

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Submitter Baidu Boy
Date Jan. 15, 2011, 11:22 a.m.
Message ID <000e01cbb4a6$75a52880$6401a8c0@LENOVOE5CA6843>
Download mbox | patch
Permalink /patch/79047/
State Superseded
Headers show

Comments

Baidu Boy - Jan. 15, 2011, 11:22 a.m.
This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is
connected with switch or we use both of the two pcie controller.

Signed-off-by: Baidu Boy <liucai.lfn@gmail.com>
---
 arch/powerpc/cpu/mpc83xx/pcie.c |   19 ++++++++++++++++++-
 include/pci.h                   |    2 ++
 2 files changed, 20 insertions(+), 1 deletions(-)
Sergei Shtylyov - Jan. 15, 2011, 4:11 p.m.
Hello.

On 15-01-2011 14:22, Baidu Boy wrote:

> This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is
> connected with switch or we use both of the two pcie controller.

> Signed-off-by: Baidu Boy <liucai.lfn@gmail.com>
[...]

> diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
> index 46a706d..c59e482 100644
> --- a/arch/powerpc/cpu/mpc83xx/pcie.c
> +++ b/arch/powerpc/cpu/mpc83xx/pcie.c
> @@ -30,6 +30,20 @@ DECLARE_GLOBAL_DATA_PTR;
>
>   #define PCIE_MAX_BUSES 2
>
> +/*private struct for mpc83xx pcie hose*/
> +static struct mpc83xx_pcie_priv{

    Need space before { here.

> +	u8 index;
> +}pcie_priv[PCIE_MAX_BUSES] = {

    And after } here.

> @@ -52,7 +66,8 @@ static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev)
>   {
>   	int bus = PCI_BUS(dev) - hose->first_busno;
>   	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
> -	pex83xx_t *pex =&immr->pciexp[bus];
> +	struct mpc83xx_pcie_priv *pcie_priv = (struct mpc83xx_pcie_priv *)hose->priv_data;

    'priv_data' is of type 'void *', so the type cast is not needed.

> +	pex83xx_t *pex =&immr->pciexp[pcie_priv->index];
>   	struct pex_outbound_window *out_win =&pex->bridge.pex_outbound_win[0];
>   	u8 devfn = PCI_DEV(dev)<<  3 | PCI_FUNC(dev);
>   	u32 dev_base = bus<<  24 | devfn<<  16;
> @@ -142,6 +157,8 @@ static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg,
>
>   	hose->cfg_addr = (unsigned int *)mpc83xx_pcie_cfg_space[bus].base;
>
> +	hose->priv_data = (void *)&pcie_priv[bus];

    Likewise, there's no need to cast to 'void *' -- the cast is automatic.

WBR, Sergei
Baidu Boy - Jan. 16, 2011, 2:58 a.m.
hi , Sergei

2011/1/16 Sergei Shtylyov <sshtylyov@mvista.com>:
> Hello.
>
> On 15-01-2011 14:22, Baidu Boy wrote:
>
>> This patch fix a problem for the pcie enumeration when the mpc83xx pcie
>> controller is
>> connected with switch or we use both of the two pcie controller.
>
>> Signed-off-by: Baidu Boy <liucai.lfn@gmail.com>
>
> [...]
>
>> diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c
>> b/arch/powerpc/cpu/mpc83xx/pcie.c
>> index 46a706d..c59e482 100644
>> --- a/arch/powerpc/cpu/mpc83xx/pcie.c
>> +++ b/arch/powerpc/cpu/mpc83xx/pcie.c
>> @@ -30,6 +30,20 @@ DECLARE_GLOBAL_DATA_PTR;
>>
>>  #define PCIE_MAX_BUSES 2
>>
>> +/*private struct for mpc83xx pcie hose*/
>> +static struct mpc83xx_pcie_priv{
>
>   Need space before { here.
>
>> +       u8 index;
>> +}pcie_priv[PCIE_MAX_BUSES] = {
>
>   And after } here.
>
>> @@ -52,7 +66,8 @@ static int mpc83xx_pcie_remap_cfg(struct pci_controller
>> *hose, pci_dev_t dev)
>>  {
>>        int bus = PCI_BUS(dev) - hose->first_busno;
>>        immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
>> -       pex83xx_t *pex =&immr->pciexp[bus];
>> +       struct mpc83xx_pcie_priv *pcie_priv = (struct mpc83xx_pcie_priv
>> *)hose->priv_data;
>
>   'priv_data' is of type 'void *', so the type cast is not needed.
>
>> +       pex83xx_t *pex =&immr->pciexp[pcie_priv->index];
>>        struct pex_outbound_window *out_win
>> =&pex->bridge.pex_outbound_win[0];
>>        u8 devfn = PCI_DEV(dev)<<  3 | PCI_FUNC(dev);
>>        u32 dev_base = bus<<  24 | devfn<<  16;
>> @@ -142,6 +157,8 @@ static void mpc83xx_pcie_register_hose(int bus, struct
>> pci_region *reg,
>>
>>        hose->cfg_addr = (unsigned int *)mpc83xx_pcie_cfg_space[bus].base;
>>
>> +       hose->priv_data = (void *)&pcie_priv[bus];
>
>   Likewise, there's no need to cast to 'void *' -- the cast is automatic.
>
> WBR, Sergei
>

I have re-submit the patch:
http://patchwork.ozlabs.org/patch/79075/

Thanks

Patch

diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index 46a706d..c59e482 100644
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -30,6 +30,20 @@  DECLARE_GLOBAL_DATA_PTR;
 
 #define PCIE_MAX_BUSES 2
 
+/*private struct for mpc83xx pcie hose*/
+static struct mpc83xx_pcie_priv{
+	u8 index;
+}pcie_priv[PCIE_MAX_BUSES] = {
+	{
+		/*pcie controller 1*/
+		.index = 0,
+	},
+	{
+		/*pcie controller 2*/		
+		.index = 1,
+	},	
+};
+
 static struct {
 	u32 base;
 	u32 size;
@@ -52,7 +66,8 @@  static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev)
 {
 	int bus = PCI_BUS(dev) - hose->first_busno;
 	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
-	pex83xx_t *pex = &immr->pciexp[bus];
+	struct mpc83xx_pcie_priv *pcie_priv = (struct mpc83xx_pcie_priv *)hose->priv_data;
+	pex83xx_t *pex = &immr->pciexp[pcie_priv->index];
 	struct pex_outbound_window *out_win = &pex->bridge.pex_outbound_win[0];
 	u8 devfn = PCI_DEV(dev) << 3 | PCI_FUNC(dev);
 	u32 dev_base = bus << 24 | devfn << 16;
@@ -142,6 +157,8 @@  static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg,
 
 	hose->cfg_addr = (unsigned int *)mpc83xx_pcie_cfg_space[bus].base;
 
+	hose->priv_data = (void *)&pcie_priv[bus];
+
 	pci_set_ops(hose,
 			pcie_read_config_byte,
 			pcie_read_config_word,
diff --git a/include/pci.h b/include/pci.h
index c456006..8b3bdbb 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -420,6 +420,8 @@  struct pci_controller {
 	/* Used by ppc405 autoconfig*/
 	struct pci_region *pci_fb;
 	int current_busno;
+
+	void *priv_data;
 };
 
 extern __inline__ void pci_set_ops(struct pci_controller *hose,