From patchwork Fri Jan 14 16:08:20 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 78937 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 966D3B70A3 for ; Sat, 15 Jan 2011 03:10:33 +1100 (EST) Received: (qmail 25488 invoked by alias); 14 Jan 2011 16:09:18 -0000 Received: (qmail 25326 invoked by uid 22791); 14 Jan 2011 16:09:13 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_NONE X-Spam-Check-By: sourceware.org Received: from a.mail.sonic.net (HELO a.mail.sonic.net) (64.142.16.245) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 14 Jan 2011 16:09:08 +0000 Received: from are.twiddle.net (are.twiddle.net [75.101.38.216]) by a.mail.sonic.net (8.13.8.Beta0-Sonic/8.13.7) with ESMTP id p0EG96Pj003536 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 14 Jan 2011 08:09:06 -0800 Received: from anchor.twiddle.home (anchor.twiddle.home [172.31.0.4]) by are.twiddle.net (8.14.4/8.14.4) with ESMTP id p0EG96t3002074; Fri, 14 Jan 2011 08:09:06 -0800 Received: from anchor.twiddle.home (localhost.localdomain [127.0.0.1]) by anchor.twiddle.home (8.14.4/8.14.4) with ESMTP id p0EG90mj028687; Fri, 14 Jan 2011 08:09:01 -0800 Received: (from rth@localhost) by anchor.twiddle.home (8.14.4/8.14.4/Submit) id p0EG8vMd028686; Fri, 14 Jan 2011 08:08:57 -0800 From: rth@redhat.com To: gcc-patches@gcc.gnu.org Cc: nickc@redhat.com, Richard Henderson Subject: [PATCH 05/14] rx: Split movsicc post-reload. Date: Fri, 14 Jan 2011 08:08:20 -0800 Message-Id: <1295021309-28608-6-git-send-email-rth@redhat.com> In-Reply-To: <1295021309-28608-1-git-send-email-rth@redhat.com> References: <1295021309-28608-1-git-send-email-rth@redhat.com> X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org From: Richard Henderson This will allow elimination of the compare. --- gcc/config/rx/rx.md | 107 +++++++++++++++++++++++++++++++++------------------ 1 files changed, 69 insertions(+), 38 deletions(-) diff --git a/gcc/config/rx/rx.md b/gcc/config/rx/rx.md index f9a7c02..4ffbfec 100644 --- a/gcc/config/rx/rx.md +++ b/gcc/config/rx/rx.md @@ -744,47 +744,78 @@ [(set (match_operand:SI 0 "register_operand") (if_then_else:SI (match_operand:SI 1 "comparison_operator") (match_operand:SI 2 "nonmemory_operand") - (match_operand:SI 3 "immediate_operand"))) - (clobber (reg:CC CC_REG))])] ;; See cstoresi4 + (match_operand:SI 3 "nonmemory_operand"))) + (clobber (reg:CC CC_REG))])] "" - { - if (GET_CODE (operands[1]) != EQ && GET_CODE (operands[1]) != NE) - FAIL; - if (! CONST_INT_P (operands[3])) - FAIL; - } -) +{ + /* ??? Support other conditions via cstore into a temporary? */ + if (GET_CODE (operands[1]) != EQ && GET_CODE (operands[1]) != NE) + FAIL; + /* One operand must be a constant. */ + if (!CONSTANT_P (operands[2]) && !CONSTANT_P (operands[3])) + FAIL; +}) -(define_insn "*movsieq" - [(set (match_operand:SI 0 "register_operand" "=r,r,r") - (if_then_else:SI (eq (match_operand:SI 3 "register_operand" "r,r,r") - (match_operand:SI 4 "rx_source_operand" "riQ,riQ,riQ")) - (match_operand:SI 1 "nonmemory_operand" "0,i,r") - (match_operand:SI 2 "immediate_operand" "i,i,i"))) - (clobber (reg:CC CC_REG))] ;; See cstoresi4 - "" - "@ - cmp\t%Q4, %Q3\n\tstnz\t%2, %0 - cmp\t%Q4, %Q3\n\tmov.l\t%2, %0\n\tstz\t%1, %0 - cmp\t%Q4, %Q3\n\tmov.l\t%1, %0\n\tstnz\t%2, %0" - [(set_attr "length" "13,19,15") - (set_attr "timings" "22,33,33")] -) +(define_insn_and_split "*movsicc" + [(set (match_operand:SI 0 "register_operand" "=r,r") + (if_then_else:SI + (match_operator 5 "rx_z_comparison_operator" + [(match_operand:SI 3 "register_operand" "r,r") + (match_operand:SI 4 "rx_source_operand" "riQ,riQ")]) + (match_operand:SI 1 "nonmemory_operand" "i,ri") + (match_operand:SI 2 "nonmemory_operand" "ri,i"))) + (clobber (reg:CC CC_REG))] + "CONSTANT_P (operands[1]) || CONSTANT_P (operands[2])" + "#" + "&& reload_completed" + [(const_int 0)] +{ + rtx x, flags, op0, op1, op2; + enum rtx_code cmp_code; -(define_insn "*movsine" - [(set (match_operand:SI 0 "register_operand" "=r,r,r") - (if_then_else:SI (ne (match_operand:SI 3 "register_operand" "r,r,r") - (match_operand:SI 4 "rx_source_operand" "riQ,riQ,riQ")) - (match_operand:SI 1 "nonmemory_operand" "0,i,r") - (match_operand:SI 2 "immediate_operand" "i,i,i"))) - (clobber (reg:CC CC_REG))] ;; See cstoresi4 - "" - "@ - cmp\t%Q4, %Q3\n\tstz\t%2, %0 - cmp\t%Q4, %Q3\n\tmov.l\t%2, %0\n\tstnz\t%1, %0 - cmp\t%Q4, %Q3\n\tmov.l\t%1, %0\n\tstz\t%2, %0" - [(set_attr "length" "13,19,15") - (set_attr "timings" "22,33,33")] + flags = gen_rtx_REG (CCmode, CC_REG); + x = gen_rtx_COMPARE (CCmode, operands[3], operands[4]); + emit_insn (gen_rtx_SET (VOIDmode, flags, x)); + + cmp_code = GET_CODE (operands[5]); + op0 = operands[0]; + op1 = operands[1]; + op2 = operands[2]; + + /* If OP2 is the constant, reverse the sense of the move. */ + if (!CONSTANT_P (operands[1])) + { + x = op1, op1 = op2, op2 = x; + cmp_code = reverse_condition (cmp_code); + } + + /* If OP2 does not match the output, copy it into place. We have allowed + these alternatives so that the destination can legitimately be one of + the comparison operands without increasing register pressure. */ + if (!rtx_equal_p (op0, op2)) + emit_move_insn (op0, op2); + + x = gen_rtx_fmt_ee (cmp_code, VOIDmode, flags, const0_rtx); + x = gen_rtx_IF_THEN_ELSE (SImode, x, op1, op0); + emit_insn (gen_rtx_SET (VOIDmode, op0, x)); + DONE; +}) + +(define_insn "*stcc" + [(set (match_operand:SI 0 "register_operand" "+r,r,r,r") + (if_then_else:SI + (match_operator 2 "rx_z_comparison_operator" + [(reg CC_REG) (const_int 0)]) + (match_operand:SI 1 "immediate_operand" "Sint08,Sint16,Sint24,i") + (match_dup 0)))] + "reload_completed" +{ + if (GET_CODE (operands[2]) == EQ) + return "stz\t%1, %0"; + else + return "stnz\t%1, %0"; +} + [(set_attr "length" "4,5,6,7")] ) ;; Arithmetic Instructions