From patchwork Fri Jan 14 16:08:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 78936 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 27A4AB70D4 for ; Sat, 15 Jan 2011 03:10:15 +1100 (EST) Received: (qmail 25278 invoked by alias); 14 Jan 2011 16:09:12 -0000 Received: (qmail 25161 invoked by uid 22791); 14 Jan 2011 16:09:09 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_NONE X-Spam-Check-By: sourceware.org Received: from b.mail.sonic.net (HELO b.mail.sonic.net) (64.142.19.5) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 14 Jan 2011 16:09:03 +0000 Received: from are.twiddle.net (are.twiddle.net [75.101.38.216]) by b.mail.sonic.net (8.13.8.Beta0-Sonic/8.13.7) with ESMTP id p0EG91pd028594 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 14 Jan 2011 08:09:01 -0800 Received: from anchor.twiddle.home (anchor.twiddle.home [172.31.0.4]) by are.twiddle.net (8.14.4/8.14.4) with ESMTP id p0EG90BI002071; Fri, 14 Jan 2011 08:09:00 -0800 Received: from anchor.twiddle.home (localhost.localdomain [127.0.0.1]) by anchor.twiddle.home (8.14.4/8.14.4) with ESMTP id p0EG8ruT028677; Fri, 14 Jan 2011 08:08:55 -0800 Received: (from rth@localhost) by anchor.twiddle.home (8.14.4/8.14.4/Submit) id p0EG8pbH028675; Fri, 14 Jan 2011 08:08:51 -0800 From: rth@redhat.com To: gcc-patches@gcc.gnu.org Cc: nickc@redhat.com, Richard Henderson Subject: [PATCH 04/14] rx: Split cstoresi4 post-reload. Date: Fri, 14 Jan 2011 08:08:19 -0800 Message-Id: <1295021309-28608-5-git-send-email-rth@redhat.com> In-Reply-To: <1295021309-28608-1-git-send-email-rth@redhat.com> References: <1295021309-28608-1-git-send-email-rth@redhat.com> X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org From: Richard Henderson This will allow elimination of the compare. --- gcc/config/rx/rx.c | 2 -- gcc/config/rx/rx.h | 2 -- gcc/config/rx/rx.md | 41 +++++++++++++++++++++++++++++------------ 3 files changed, 29 insertions(+), 16 deletions(-) diff --git a/gcc/config/rx/rx.c b/gcc/config/rx/rx.c index a2ff95e..992c585 100644 --- a/gcc/config/rx/rx.c +++ b/gcc/config/rx/rx.c @@ -363,8 +363,6 @@ rx_assemble_integer (rtx x, unsigned int size, int is_aligned) } -int rx_float_compare_mode; - /* Handles the insertion of a single operand into the assembler output. The % directives supported are: diff --git a/gcc/config/rx/rx.h b/gcc/config/rx/rx.h index d26c80c..e2c8641 100644 --- a/gcc/config/rx/rx.h +++ b/gcc/config/rx/rx.h @@ -595,8 +595,6 @@ typedef unsigned int CUMULATIVE_ARGS; they contain are always computed between two same-section symbols. */ #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic) -extern int rx_float_compare_mode; - /* This is a version of REG_P that also returns TRUE for SUBREGs. */ #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG) diff --git a/gcc/config/rx/rx.md b/gcc/config/rx/rx.md index c2161a2..f9a7c02 100644 --- a/gcc/config/rx/rx.md +++ b/gcc/config/rx/rx.md @@ -706,20 +706,37 @@ (set_attr "timings" "45")] ;; The timing is a guesstimate average timing. ) -;; FIXME: Add memory destination options ? -(define_insn "cstoresi4" - [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r") +(define_insn_and_split "cstoresi4" + [(set (match_operand:SI 0 "register_operand" "=r") (match_operator:SI 1 "comparison_operator" - [(match_operand:SI 2 "register_operand" "r,r,r,r,r,r,r") - (match_operand:SI 3 "rx_source_operand" "r,Uint04,Int08,Sint16,Sint24,i,Q")])) - (clobber (reg:CC CC_REG))] ;; Because the cc flags are set based on comparing ops 2 & 3 not the value in op 0. + [(match_operand:SI 2 "register_operand" "r") + (match_operand:SI 3 "rx_source_operand" "riQ")])) + (clobber (reg:CC CC_REG))] "" - { - rx_float_compare_mode = false; - return "cmp\t%Q3, %Q2\n\tsc%B1.L\t%0"; - } - [(set_attr "timings" "22,22,22,22,22,22,44") - (set_attr "length" "5,5,6,7,8,9,8")] + "#" + "reload_completed" + [(const_int 0)] +{ + rtx flags, x; + + flags = gen_rtx_REG (CCmode, CC_REG); + x = gen_rtx_COMPARE (CCmode, operands[2], operands[3]); + x = gen_rtx_SET (VOIDmode, flags, x); + emit_insn (x); + + x = gen_rtx_fmt_ee (GET_CODE (operands[1]), SImode, flags, const0_rtx); + x = gen_rtx_SET (VOIDmode, operands[0], x); + emit_insn (x); + DONE; +}) + +(define_insn "*sccc" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operator:SI 1 "comparison_operator" + [(reg CC_REG) (const_int 0)]))] + "reload_completed" + "sc%B1.L\t%0" + [(set_attr "length" "3")] ) (define_expand "movsicc"