From patchwork Wed Jul 12 09:43:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Leroy X-Patchwork-Id: 787104 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3x6vMs36msz9s65 for ; Wed, 12 Jul 2017 19:50:46 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 28785C21F29; Wed, 12 Jul 2017 09:50:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 834C0C21FB0; Wed, 12 Jul 2017 09:44:04 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0856FC21F11; Wed, 12 Jul 2017 09:43:43 +0000 (UTC) Received: from pegase1.c-s.fr (pegase1.c-s.fr [93.17.236.30]) by lists.denx.de (Postfix) with ESMTPS id 73C05C21F47 for ; Wed, 12 Jul 2017 09:43:39 +0000 (UTC) Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 3x6vCN4tnwz9ttBg; Wed, 12 Jul 2017 11:43:28 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id KtywVrNiAcXL; Wed, 12 Jul 2017 11:43:28 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 3x6vCN4Pl4z9ttBV; Wed, 12 Jul 2017 11:43:28 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 1C5648B830; Wed, 12 Jul 2017 11:43:39 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id 3Qoy6aXIfL6V; Wed, 12 Jul 2017 11:43:39 +0200 (CEST) Received: from pc13941vm.idsi0.si.c-s.fr (po15451.idsi0.si.c-s.fr [172.25.231.8]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 0068F8B7FE; Wed, 12 Jul 2017 11:43:38 +0200 (CEST) Received: by pc13941vm.idsi0.si.c-s.fr (Postfix, from userid 0) id CA6856A666; Wed, 12 Jul 2017 11:43:38 +0200 (CEST) Message-Id: <3bdd545d711bec89e600d731e0a3d56f9cf4f2bb.1499629706.git.christophe.leroy@c-s.fr> In-Reply-To: References: From: Christophe Leroy To: Wolfgang Denk , Heiko Schocher , Tom Rini Date: Wed, 12 Jul 2017 11:43:38 +0200 (CEST) Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 11/14] powerpc, 8xx: move cache helper into C X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Avoid unnecessary assembly functions when they can easily be written in C. Signed-off-by: Christophe Leroy --- arch/powerpc/cpu/mpc8xx/start.S | 32 -------------------------------- arch/powerpc/include/asm/cache.h | 32 ++++++++++++++++++++++++++++++++ arch/powerpc/include/asm/ppc.h | 6 ------ 3 files changed, 32 insertions(+), 38 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index fbdc82a079..4c25d3765b 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -310,38 +310,6 @@ get_pvr: mfspr r3, PVR blr - - .globl wr_ic_cst -wr_ic_cst: - mtspr IC_CST, r3 - blr - - .globl rd_ic_cst -rd_ic_cst: - mfspr r3, IC_CST - blr - - .globl wr_ic_adr -wr_ic_adr: - mtspr IC_ADR, r3 - blr - - - .globl wr_dc_cst -wr_dc_cst: - mtspr DC_CST, r3 - blr - - .globl rd_dc_cst -rd_dc_cst: - mfspr r3, DC_CST - blr - - .globl wr_dc_adr -wr_dc_adr: - mtspr DC_ADR, r3 - blr - /*------------------------------------------------------------------------------*/ /* diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index d3a83910b6..0801d2c367 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h @@ -107,6 +107,38 @@ void disable_cpc_sram(void); #define DC_DFWT 0x40000000 /* Data cache is forced write through */ #define DC_LES 0x20000000 /* Caches are little endian mode */ + +#if !defined(__ASSEMBLY__) +static inline uint rd_ic_cst(void) +{ + return mfspr(IC_CST); +} + +static inline void wr_ic_cst(uint val) +{ + mtspr(IC_CST, val); +} + +static inline void wr_ic_adr(uint val) +{ + mtspr(IC_ADR, val); +} + +static inline uint rd_dc_cst(void) +{ + return mfspr(DC_CST); +} + +static inline void wr_dc_cst(uint val) +{ + mtspr(DC_CST, val); +} + +static inline void wr_dc_adr(uint val) +{ + mtspr(DC_ADR, val); +} +#endif #endif /* CONFIG_8xx */ #endif diff --git a/arch/powerpc/include/asm/ppc.h b/arch/powerpc/include/asm/ppc.h index 1f650a7fb3..c41dc1fee0 100644 --- a/arch/powerpc/include/asm/ppc.h +++ b/arch/powerpc/include/asm/ppc.h @@ -50,12 +50,6 @@ static inline uint get_immr(uint mask) #endif uint get_pvr(void); uint get_svr(void); -uint rd_ic_cst(void); -void wr_ic_cst(uint); -void wr_ic_adr(uint); -uint rd_dc_cst(void); -void wr_dc_cst(uint); -void wr_dc_adr(uint); #if defined(CONFIG_MPC85xx) || \ defined(CONFIG_MPC86xx) || \