| Message ID | D5741445-7EFD-4AF1-8DB2-E4AFA93CBB1A@icloud.com |
|---|---|
| State | New |
| Headers | show |
On 10/07/2017 22:57, Theodore Dubois wrote:
> - Clang doesn't support size suffixes on the loop instructions.
Has this bug been reported?
Paolo
I don’t believe so, I haven’t been able to find it in the bug database. ~Theodore > On Jul 10, 2017, at 2:48 PM, Paolo Bonzini <pbonzini@redhat.com> wrote: > > On 10/07/2017 22:57, Theodore Dubois wrote: >> - Clang doesn't support size suffixes on the loop instructions. > > Has this bug been reported? > > Paolo >
On 11/07/2017 00:13, Theodore Dubois wrote: > I don’t believe so, I haven’t been able to find it in the bug database. This is now https://bugs.llvm.org/show_bug.cgi?id=33741. Paolo > ~Theodore > >> On Jul 10, 2017, at 2:48 PM, Paolo Bonzini <pbonzini@redhat.com> wrote: >> >> On 10/07/2017 22:57, Theodore Dubois wrote: >>> - Clang doesn't support size suffixes on the loop instructions. >> >> Has this bug been reported? >> >> Paolo >> >
ping http://patchwork.ozlabs.org/patch/786393/ ~Theodore > On Jul 10, 2017, at 1:57 PM, Theodore Dubois <tblodt@icloud.com> wrote: > > Clang's assembler is slightly incompatible with GCC's assembler, which > caused the program to not compile on Clang for these reasons: > > - The "q" constraint was specified for an argument to the set > instruction, which didn't work because Clang chose the esi register, > which has no 8-bit form on i386. > - Clang doesn't support size suffixes on the loop instructions. > - Clang requires a size suffix on the fist instruction. > - Clang doesn't support specifying segment prefixes before the > instruction, and requires specifying them on the address. > - The arguments to the bound instruction are in the wrong order on > Clang. https://bugs.llvm.org/show_bug.cgi?id=27653 > > Signed-off-by: Theodore Dubois <tblodt@icloud.com> > --- > tests/tcg/test-i386.c | 20 ++++++++++++++++---- > 1 file changed, 16 insertions(+), 4 deletions(-) > > diff --git a/tests/tcg/test-i386.c b/tests/tcg/test-i386.c > index 0f7b943b0c..dcb8e4876e 100644 > --- a/tests/tcg/test-i386.c > +++ b/tests/tcg/test-i386.c > @@ -369,7 +369,7 @@ void test_lea(void) > asm("movl $0, %0\n\t"\ > "cmpl %2, %1\n\t"\ > "set" JCC " %b0\n\t"\ > - : "=r" (res)\ > + : "=q" (res)\ > : "r" (v1), "r" (v2));\ > printf("%-10s %d\n", "set" JCC, res);\ > if (TEST_CMOV) {\ > @@ -491,15 +491,23 @@ void test_loop(void) > > #if !defined(__x86_64__) > TEST_LOOP("jcxz"); > +#if !defined(__clang__) > TEST_LOOP("loopw"); > TEST_LOOP("loopzw"); > TEST_LOOP("loopnzw"); > #endif > +#endif > > TEST_LOOP("jecxz"); > +#if !defined(__clang__) > TEST_LOOP("loopl"); > TEST_LOOP("loopzl"); > TEST_LOOP("loopnzl"); > +#else > + TEST_LOOP("loop"); > + TEST_LOOP("loopz"); > + TEST_LOOP("loopnz"); > +#endif > } > > #undef CC_MASK > @@ -867,7 +875,7 @@ void test_fcvt(double a) > uint16_t val16; > val16 = (fpuc & ~0x0c00) | (i << 10); > asm volatile ("fldcw %0" : : "m" (val16)); > - asm volatile ("fist %0" : "=m" (wa) : "t" (a)); > + asm volatile ("fists %0" : "=m" (wa) : "t" (a)); > asm volatile ("fistl %0" : "=m" (ia) : "t" (a)); > asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st"); > asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a)); > @@ -1318,12 +1326,12 @@ void test_segs(void) > seg_data1[1] = 0xaa; > seg_data2[1] = 0x55; > > - asm volatile ("fs movzbl 0x1, %0" : "=r" (res)); > + asm volatile ("movzbl %%fs:0x1, %0" : "=r" (res)); > printf("FS[1] = %02x\n", res); > > asm volatile ("pushl %%gs\n" > "movl %1, %%gs\n" > - "gs movzbl 0x1, %0\n" > + "movzbl %%gs:0x1, %0\n" > "popl %%gs\n" > : "=r" (res) > : "r" (MK_SEL(2))); > @@ -1764,7 +1772,11 @@ void test_exceptions(void) > /* bound exception */ > tab[0] = 1; > tab[1] = 10; > +#if defined(__clang__) > + asm volatile ("bound %1, %0" : : "r" (11), "m" (tab[0])); > +#else > asm volatile ("bound %0, %1" : : "r" (11), "m" (tab[0])); > +#endif > } > #endif > > -- > 2.13.2 > > > > ~Theodore > >
Theodore Dubois <tblodt@icloud.com> writes: > ping http://patchwork.ozlabs.org/patch/786393/ Applied to tct-tests/next with another patch to work around enterq. Sorry for the delay. > > ~Theodore > >> On Jul 10, 2017, at 1:57 PM, Theodore Dubois <tblodt@icloud.com> wrote: >> >> Clang's assembler is slightly incompatible with GCC's assembler, which >> caused the program to not compile on Clang for these reasons: >> >> - The "q" constraint was specified for an argument to the set >> instruction, which didn't work because Clang chose the esi register, >> which has no 8-bit form on i386. >> - Clang doesn't support size suffixes on the loop instructions. >> - Clang requires a size suffix on the fist instruction. >> - Clang doesn't support specifying segment prefixes before the >> instruction, and requires specifying them on the address. >> - The arguments to the bound instruction are in the wrong order on >> Clang. https://bugs.llvm.org/show_bug.cgi?id=27653 >> >> Signed-off-by: Theodore Dubois <tblodt@icloud.com> >> --- >> tests/tcg/test-i386.c | 20 ++++++++++++++++---- >> 1 file changed, 16 insertions(+), 4 deletions(-) >> >> diff --git a/tests/tcg/test-i386.c b/tests/tcg/test-i386.c >> index 0f7b943b0c..dcb8e4876e 100644 >> --- a/tests/tcg/test-i386.c >> +++ b/tests/tcg/test-i386.c >> @@ -369,7 +369,7 @@ void test_lea(void) >> asm("movl $0, %0\n\t"\ >> "cmpl %2, %1\n\t"\ >> "set" JCC " %b0\n\t"\ >> - : "=r" (res)\ >> + : "=q" (res)\ >> : "r" (v1), "r" (v2));\ >> printf("%-10s %d\n", "set" JCC, res);\ >> if (TEST_CMOV) {\ >> @@ -491,15 +491,23 @@ void test_loop(void) >> >> #if !defined(__x86_64__) >> TEST_LOOP("jcxz"); >> +#if !defined(__clang__) >> TEST_LOOP("loopw"); >> TEST_LOOP("loopzw"); >> TEST_LOOP("loopnzw"); >> #endif >> +#endif >> >> TEST_LOOP("jecxz"); >> +#if !defined(__clang__) >> TEST_LOOP("loopl"); >> TEST_LOOP("loopzl"); >> TEST_LOOP("loopnzl"); >> +#else >> + TEST_LOOP("loop"); >> + TEST_LOOP("loopz"); >> + TEST_LOOP("loopnz"); >> +#endif >> } >> >> #undef CC_MASK >> @@ -867,7 +875,7 @@ void test_fcvt(double a) >> uint16_t val16; >> val16 = (fpuc & ~0x0c00) | (i << 10); >> asm volatile ("fldcw %0" : : "m" (val16)); >> - asm volatile ("fist %0" : "=m" (wa) : "t" (a)); >> + asm volatile ("fists %0" : "=m" (wa) : "t" (a)); >> asm volatile ("fistl %0" : "=m" (ia) : "t" (a)); >> asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st"); >> asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a)); >> @@ -1318,12 +1326,12 @@ void test_segs(void) >> seg_data1[1] = 0xaa; >> seg_data2[1] = 0x55; >> >> - asm volatile ("fs movzbl 0x1, %0" : "=r" (res)); >> + asm volatile ("movzbl %%fs:0x1, %0" : "=r" (res)); >> printf("FS[1] = %02x\n", res); >> >> asm volatile ("pushl %%gs\n" >> "movl %1, %%gs\n" >> - "gs movzbl 0x1, %0\n" >> + "movzbl %%gs:0x1, %0\n" >> "popl %%gs\n" >> : "=r" (res) >> : "r" (MK_SEL(2))); >> @@ -1764,7 +1772,11 @@ void test_exceptions(void) >> /* bound exception */ >> tab[0] = 1; >> tab[1] = 10; >> +#if defined(__clang__) >> + asm volatile ("bound %1, %0" : : "r" (11), "m" (tab[0])); >> +#else >> asm volatile ("bound %0, %1" : : "r" (11), "m" (tab[0])); >> +#endif >> } >> #endif >> >> -- >> 2.13.2 >> >> >> >> ~Theodore >> >> -- Alex Bennée
diff --git a/tests/tcg/test-i386.c b/tests/tcg/test-i386.c index 0f7b943b0c..dcb8e4876e 100644 --- a/tests/tcg/test-i386.c +++ b/tests/tcg/test-i386.c @@ -369,7 +369,7 @@ void test_lea(void) asm("movl $0, %0\n\t"\ "cmpl %2, %1\n\t"\ "set" JCC " %b0\n\t"\ - : "=r" (res)\ + : "=q" (res)\ : "r" (v1), "r" (v2));\ printf("%-10s %d\n", "set" JCC, res);\ if (TEST_CMOV) {\ @@ -491,15 +491,23 @@ void test_loop(void) #if !defined(__x86_64__) TEST_LOOP("jcxz"); +#if !defined(__clang__) TEST_LOOP("loopw"); TEST_LOOP("loopzw"); TEST_LOOP("loopnzw"); #endif +#endif TEST_LOOP("jecxz"); +#if !defined(__clang__) TEST_LOOP("loopl"); TEST_LOOP("loopzl"); TEST_LOOP("loopnzl"); +#else + TEST_LOOP("loop"); + TEST_LOOP("loopz"); + TEST_LOOP("loopnz"); +#endif } #undef CC_MASK @@ -867,7 +875,7 @@ void test_fcvt(double a) uint16_t val16; val16 = (fpuc & ~0x0c00) | (i << 10); asm volatile ("fldcw %0" : : "m" (val16)); - asm volatile ("fist %0" : "=m" (wa) : "t" (a)); + asm volatile ("fists %0" : "=m" (wa) : "t" (a)); asm volatile ("fistl %0" : "=m" (ia) : "t" (a)); asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st"); asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a)); @@ -1318,12 +1326,12 @@ void test_segs(void) seg_data1[1] = 0xaa; seg_data2[1] = 0x55; - asm volatile ("fs movzbl 0x1, %0" : "=r" (res)); + asm volatile ("movzbl %%fs:0x1, %0" : "=r" (res)); printf("FS[1] = %02x\n", res); asm volatile ("pushl %%gs\n" "movl %1, %%gs\n" - "gs movzbl 0x1, %0\n" + "movzbl %%gs:0x1, %0\n" "popl %%gs\n" : "=r" (res) : "r" (MK_SEL(2))); @@ -1764,7 +1772,11 @@ void test_exceptions(void) /* bound exception */ tab[0] = 1; tab[1] = 10; +#if defined(__clang__) + asm volatile ("bound %1, %0" : : "r" (11), "m" (tab[0])); +#else asm volatile ("bound %0, %1" : : "r" (11), "m" (tab[0])); +#endif } #endif
Clang's assembler is slightly incompatible with GCC's assembler, which caused the program to not compile on Clang for these reasons: - The "q" constraint was specified for an argument to the set instruction, which didn't work because Clang chose the esi register, which has no 8-bit form on i386. - Clang doesn't support size suffixes on the loop instructions. - Clang requires a size suffix on the fist instruction. - Clang doesn't support specifying segment prefixes before the instruction, and requires specifying them on the address. - The arguments to the bound instruction are in the wrong order on Clang. https://bugs.llvm.org/show_bug.cgi?id=27653 Signed-off-by: Theodore Dubois <tblodt@icloud.com> --- tests/tcg/test-i386.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-)