From patchwork Wed Jan 12 18:42:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 78610 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4444AB6F10 for ; Thu, 13 Jan 2011 05:46:05 +1100 (EST) Received: from localhost ([127.0.0.1]:35535 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pd5h4-0004Ev-LG for incoming@patchwork.ozlabs.org; Wed, 12 Jan 2011 13:45:14 -0500 Received: from [140.186.70.92] (port=58018 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pd5er-0003RX-5B for qemu-devel@nongnu.org; Wed, 12 Jan 2011 13:42:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Pd5em-0000Rb-5b for qemu-devel@nongnu.org; Wed, 12 Jan 2011 13:42:57 -0500 Received: from hall.aurel32.net ([88.191.126.93]:49283) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Pd5el-0000RL-Rl for qemu-devel@nongnu.org; Wed, 12 Jan 2011 13:42:52 -0500 Received: from [2001:470:d4ed:0:5e26:aff:fe2b:6f5b] (helo=volta.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.69) (envelope-from ) id 1Pd5ej-0006rQ-1C; Wed, 12 Jan 2011 19:42:49 +0100 Received: from aurel32 by volta.aurel32.net with local (Exim 4.72) (envelope-from ) id 1Pd5ek-0005xX-0Y; Wed, 12 Jan 2011 19:42:50 +0100 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Wed, 12 Jan 2011 19:42:48 +0100 Message-Id: <1294857768-22871-2-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1294857768-22871-1-git-send-email-aurelien@aurel32.net> References: <1294857768-22871-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: Peter Maydell , Nathan Froyd , Alexander Graf , Aurelien Jarno Subject: [Qemu-devel] [PATCH 2/2] target-ppc: fix wrong NaN tests X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Some tests in FPU emulation code were wrongly using float64_is_nan() before commit 185698715dfb18c82ad2a5dbc169908602d43e81, and wrongly using float64_is_quiet_nan() after. Fix them by using float64_is_any_nan() instead. Cc: Alexander Graf Cc: Peter Maydell Cc: Nathan Froyd Signed-off-by: Aurelien Jarno Reviewed-by: Nathan Froyd --- target-ppc/op_helper.c | 45 ++++++++++++++++++++++++++++----------------- 1 files changed, 28 insertions(+), 17 deletions(-) diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 7ae5052..9e4cf36 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -546,7 +546,7 @@ uint32_t helper_compute_fprf (uint64_t arg, uint32_t set_fprf) int ret; farg.ll = arg; isneg = float64_is_neg(farg.d); - if (unlikely(float64_is_quiet_nan(farg.d))) { + if (unlikely(float64_is_any_nan(farg.d))) { if (float64_is_signaling_nan(farg.d)) { /* Signaling NaN: flags are undefined */ ret = 0x00; @@ -1356,8 +1356,9 @@ uint64_t helper_fnmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) /* This is OK on x86 hosts */ farg1.d = (farg1.d * farg2.d) + farg3.d; #endif - if (likely(!float64_is_quiet_nan(farg1.d))) + if (likely(!float64_is_any_nan(farg1.d))) { farg1.d = float64_chs(farg1.d); + } } return farg1.ll; } @@ -1402,8 +1403,9 @@ uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) /* This is OK on x86 hosts */ farg1.d = (farg1.d * farg2.d) - farg3.d; #endif - if (likely(!float64_is_quiet_nan(farg1.d))) + if (likely(!float64_is_any_nan(farg1.d))) { farg1.d = float64_chs(farg1.d); + } } return farg1.ll; } @@ -1506,10 +1508,11 @@ uint64_t helper_fsel (uint64_t arg1, uint64_t arg2, uint64_t arg3) farg1.ll = arg1; - if ((!float64_is_neg(farg1.d) || float64_is_zero(farg1.d)) && !float64_is_quiet_nan(farg1.d)) + if ((!float64_is_neg(farg1.d) || float64_is_zero(farg1.d)) && !float64_is_any_nan(farg1.d)) { return arg2; - else + } else { return arg3; + } } void helper_fcmpu (uint64_t arg1, uint64_t arg2, uint32_t crfD) @@ -1519,8 +1522,8 @@ void helper_fcmpu (uint64_t arg1, uint64_t arg2, uint32_t crfD) farg1.ll = arg1; farg2.ll = arg2; - if (unlikely(float64_is_quiet_nan(farg1.d) || - float64_is_quiet_nan(farg2.d))) { + if (unlikely(float64_is_any_nan(farg1.d) || + float64_is_any_nan(farg2.d))) { ret = 0x01UL; } else if (float64_lt(farg1.d, farg2.d, &env->fp_status)) { ret = 0x08UL; @@ -1548,8 +1551,8 @@ void helper_fcmpo (uint64_t arg1, uint64_t arg2, uint32_t crfD) farg1.ll = arg1; farg2.ll = arg2; - if (unlikely(float64_is_quiet_nan(farg1.d) || - float64_is_quiet_nan(farg2.d))) { + if (unlikely(float64_is_any_nan(farg1.d) || + float64_is_any_nan(farg2.d))) { ret = 0x01UL; } else if (float64_lt(farg1.d, farg2.d, &env->fp_status)) { ret = 0x08UL; @@ -3434,8 +3437,9 @@ uint32_t helper_efdctsi (uint64_t val) u.ll = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float64_is_quiet_nan(u.d))) + if (unlikely(float64_is_any_nan(u.d))) { return 0; + } return float64_to_int32(u.d, &env->vec_status); } @@ -3446,8 +3450,9 @@ uint32_t helper_efdctui (uint64_t val) u.ll = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float64_is_quiet_nan(u.d))) + if (unlikely(float64_is_any_nan(u.d))) { return 0; + } return float64_to_uint32(u.d, &env->vec_status); } @@ -3458,8 +3463,9 @@ uint32_t helper_efdctsiz (uint64_t val) u.ll = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float64_is_quiet_nan(u.d))) + if (unlikely(float64_is_any_nan(u.d))) { return 0; + } return float64_to_int32_round_to_zero(u.d, &env->vec_status); } @@ -3470,8 +3476,9 @@ uint64_t helper_efdctsidz (uint64_t val) u.ll = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float64_is_quiet_nan(u.d))) + if (unlikely(float64_is_any_nan(u.d))) { return 0; + } return float64_to_int64_round_to_zero(u.d, &env->vec_status); } @@ -3482,8 +3489,9 @@ uint32_t helper_efdctuiz (uint64_t val) u.ll = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float64_is_quiet_nan(u.d))) + if (unlikely(float64_is_any_nan(u.d))) { return 0; + } return float64_to_uint32_round_to_zero(u.d, &env->vec_status); } @@ -3494,8 +3502,9 @@ uint64_t helper_efdctuidz (uint64_t val) u.ll = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float64_is_quiet_nan(u.d))) + if (unlikely(float64_is_any_nan(u.d))) { return 0; + } return float64_to_uint64_round_to_zero(u.d, &env->vec_status); } @@ -3531,8 +3540,9 @@ uint32_t helper_efdctsf (uint64_t val) u.ll = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float64_is_quiet_nan(u.d))) + if (unlikely(float64_is_any_nan(u.d))) { return 0; + } tmp = uint64_to_float64(1ULL << 32, &env->vec_status); u.d = float64_mul(u.d, tmp, &env->vec_status); @@ -3546,8 +3556,9 @@ uint32_t helper_efdctuf (uint64_t val) u.ll = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float64_is_quiet_nan(u.d))) + if (unlikely(float64_is_any_nan(u.d))) { return 0; + } tmp = uint64_to_float64(1ULL << 32, &env->vec_status); u.d = float64_mul(u.d, tmp, &env->vec_status);