From patchwork Thu Jul 6 15:53:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Yves MORDRET X-Patchwork-Id: 785205 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3x3Mk13QXXz9s2s for ; Fri, 7 Jul 2017 01:54:17 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751887AbdGFPxz (ORCPT ); Thu, 6 Jul 2017 11:53:55 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:50452 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751734AbdGFPxx (ORCPT ); Thu, 6 Jul 2017 11:53:53 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v66FmxUT017067; Thu, 6 Jul 2017 17:53:16 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-.pphosted.com with ESMTP id 2bhr4k811g-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 06 Jul 2017 17:53:16 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2D989E0; Thu, 6 Jul 2017 15:53:16 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node2.st.com [10.75.127.14]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 178482906; Thu, 6 Jul 2017 15:53:16 +0000 (GMT) Received: from localhost (10.75.127.48) by SFHDAG5NODE2.st.com (10.75.127.14) with Microsoft SMTP Server (TLS) id 15.0.1178.4; Thu, 6 Jul 2017 17:53:15 +0200 From: Pierre-Yves MORDRET To: Wolfram Sang , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue , Russell King , , , , CC: Subject: [PATCH v3 4/5] ARM: dts: stm32: Add I2C1 support for STM32F746 SoC Date: Thu, 6 Jul 2017 17:53:05 +0200 Message-ID: <1499356386-28779-5-git-send-email-pierre-yves.mordret@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499356386-28779-1-git-send-email-pierre-yves.mordret@st.com> References: <1499356386-28779-1-git-send-email-pierre-yves.mordret@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG3NODE2.st.com (10.75.127.8) To SFHDAG5NODE2.st.com (10.75.127.14) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-07-06_10:, , signatures=0 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org This patch adds I2C1 support for STM32F746 SoC. Signed-off-by: M'boumba Cedric Madianga Signed-off-by: Pierre-Yves MORDRET --- Version history: v3: * None v2: * Update I2C SoC device tree with latest Linux version --- --- arch/arm/boot/dts/stm32f746.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index c2765ce..b00b96b 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -326,6 +326,16 @@ bias-disable; }; }; + + i2c1_pins_b: i2c1@0 { + pins { + pinmux = , + ; + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; }; crc: crc@40023000 { @@ -344,6 +354,18 @@ assigned-clocks = <&rcc 1 CLK_HSE_RTC>; assigned-clock-rates = <1000000>; }; + + i2c1: i2c@40005400 { + compatible = "st,stm32f7-i2c"; + reg = <0x40005400 0x400>; + interrupts = <31>, + <32>; + resets = <&rcc STM32F7_APB1_RESET(I2C1)>; + clocks = <&rcc 1 CLK_I2C1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; };