[PATCHv2,6/6] SLW: Set stop4 as deepest idle state

Submitted by Akshay Adiga on July 5, 2017, 10:38 a.m.

Details

Message ID 1499251121-19678-7-git-send-email-akshay.adiga@linux.vnet.ibm.com
State New
Headers show

Commit Message

Akshay Adiga July 5, 2017, 10:38 a.m.
Replacing stop4 with stop1 as the deepest idle state. Latency has been
set high so that stop4 is not picked for cpuidle and will only be used
for cpu hotplug.

Signed-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>
---
 hw/slw.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

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diff --git a/hw/slw.c b/hw/slw.c
index 288295a..9a0edf4 100644
--- a/hw/slw.c
+++ b/hw/slw.c
@@ -681,17 +681,17 @@  static struct cpu_idle_states power9_ndd1_cpu_idle_states[] = {
 				 | OPAL_PM_PSSCR_TR(3),
 		.pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },
 	{
-		.name = "stop1",
+		.name = "stop4",
 		.latency_ns = 2050000,
 		.residency_ns = 50000,
 		.flags = 0*OPAL_PM_DEC_STOP \
 		       | 0*OPAL_PM_TIMEBASE_STOP  \
 		       | 1*OPAL_PM_LOSE_USER_CONTEXT \
-		       | 0*OPAL_PM_LOSE_HYP_CONTEXT \
-		       | 0*OPAL_PM_LOSE_FULL_CONTEXT \
-		       | 1*OPAL_PM_STOP_INST_FAST,
-		.pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(1) \
-				 | OPAL_PM_PSSCR_MTL(3) \
+		       | 1*OPAL_PM_LOSE_HYP_CONTEXT \
+		       | 1*OPAL_PM_LOSE_FULL_CONTEXT \
+		       | 1*OPAL_PM_STOP_INST_DEEP,
+		.pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(4) \
+				 | OPAL_PM_PSSCR_MTL(7) \
 				 | OPAL_PM_PSSCR_TR(3) \
 				 | OPAL_PM_PSSCR_ESL \
 				 | OPAL_PM_PSSCR_EC,