[PATCHv2,4/6] SLW: Configure self-restore for HRMOR

Message ID 1499251121-19678-5-git-send-email-akshay.adiga@linux.vnet.ibm.com
State Superseded
Headers show

Commit Message

Akshay Adiga July 5, 2017, 10:38 a.m.
Make a stop api call using libpore to restore HRMOR register. HRMOR needs
to be cleared so that when thread exits stop, they arrives at linux
system_reset vector (0x100).

Signed-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>
---
 hw/slw.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

Comments

Gautham R Shenoy July 5, 2017, 5:20 p.m. | #1
On Wed, Jul 05, 2017 at 04:08:39PM +0530, Akshay Adiga wrote:
> Make a stop api call using libpore to restore HRMOR register. HRMOR needs
> to be cleared so that when thread exits stop, they arrives at linux
> system_reset vector (0x100).
> 
> Signed-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>

Tested-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>

Patch

diff --git a/hw/slw.c b/hw/slw.c
index 4600279..c943d80 100644
--- a/hw/slw.c
+++ b/hw/slw.c
@@ -1145,12 +1145,41 @@  static void slw_patch_regs(struct proc_chip *chip)
 static void slw_init_chip_p9(struct proc_chip *chip)
 {
 	struct cpu_thread *c;
+	int rc;
 
 	prlog(PR_DEBUG, "SLW: Init chip 0x%x\n", chip->id);
 
 	/* At power ON setup inits for power-mgt */
 	for_each_available_core_in_chip(c, chip->id)
 		slw_set_overrides_p9(chip, c);
+
+	if (!chip->homer_base) {
+		log_simple_error(&e_info(OPAL_RC_SLW_REG),
+				 "SLW: HOMER base not set %x\n",
+				 chip->id);
+		return;
+	}
+
+	prlog(PR_NOTICE, "SLW: Configuring self-restore for HRMOR\n");
+
+	/* Should this be for_each_present_cpu() ? */
+	for_each_available_cpu(c) {
+		if (c->chip_id != chip->id)
+			continue;
+
+		/*
+		 * Clear HRMOR. Need to update only for thread
+		 * 0 of each core. Doing it anyway for all threads
+		 */
+		rc =  p9_stop_save_cpureg((void *)chip->homer_base,
+						P9_STOP_SPR_HRMOR, 0,
+					       c->pir);
+		if (rc) {
+			log_simple_error(&e_info(OPAL_RC_SLW_REG),
+				 "SLW: Failed to set HRMOR for CPU %x,RC=0x%x\n",
+				 c->pir, rc);
+		}
+	}
 }
 static void slw_init_chip(struct proc_chip *chip)
 {