From patchwork Fri Jun 30 06:05:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WmhpIE1hbyAo5q+b5pm6KQ==?= X-Patchwork-Id: 782668 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wzQyM5rZ8z9sNX for ; Fri, 30 Jun 2017 16:06:19 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752144AbdF3GGS (ORCPT ); Fri, 30 Jun 2017 02:06:18 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:46085 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752377AbdF3GFv (ORCPT ); Fri, 30 Jun 2017 02:05:51 -0400 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 704774367; Fri, 30 Jun 2017 14:05:45 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Fri, 30 Jun 2017 14:05:44 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Fri, 30 Jun 2017 14:05:43 +0800 From: Zhi Mao To: , Thierry Reding , Rob Herring , Mark Rutland , Matthias Brugger , CC: , , , , , , , , , Subject: [PATCH v3 4/6] pwm: bindings: add MT2712/MT7622 information Date: Fri, 30 Jun 2017 14:05:19 +0800 Message-ID: <1498802721-32455-5-git-send-email-zhi.mao@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1498802721-32455-1-git-send-email-zhi.mao@mediatek.com> References: <1498802721-32455-1-git-send-email-zhi.mao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org add MT2712/MT7622 pwm information Acked-by: Rob Herring Signed-off-by: Zhi Mao Acked-by: Rob Herring Signed-off-by: Zhi Mao Acked-by: John Crispin Signed-off-by: Thierry Reding --- .../devicetree/bindings/pwm/pwm-mediatek.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt index 54c59b0..ef8bd3c 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt @@ -2,6 +2,8 @@ MediaTek PWM controller Required properties: - compatible: should be "mediatek,-pwm": + - "mediatek,mt2712-pwm": found on mt2712 SoC. + - "mediatek,mt7622-pwm": found on mt7622 SoC. - "mediatek,mt7623-pwm": found on mt7623 SoC. - reg: physical base address and length of the controller's registers. - #pwm-cells: must be 2. See pwm.txt in this directory for a description of @@ -10,7 +12,9 @@ Required properties: - clock-names: must contain the following: - "top": the top clock generator - "main": clock used by the PWM core - - "pwm1-5": the five per PWM clocks + - "pwm1-8": the eight per PWM clocks for mt2712 + - "pwm1-6": the six per PWM clocks for mt7622 + - "pwm1-5": the five per PWM clocks for mt7623 - pinctrl-names: Must contain a "default" entry. - pinctrl-0: One property must exist for each entry in pinctrl-names. See pinctrl/pinctrl-bindings.txt for details of the property values.