Patchwork [1/4] target-arm: Remove redundant setting of IT bits before Thumb SWI

login
register
mail settings
Submitter Peter Maydell
Date Jan. 10, 2011, 11:11 p.m.
Message ID <1294701112-14071-2-git-send-email-peter.maydell@linaro.org>
Download mbox | patch
Permalink /patch/78258/
State New
Headers show

Comments

Peter Maydell - Jan. 10, 2011, 11:11 p.m.
Remove a redundant call to gen_set_condexec() in the translation of Thumb
mode SWI. (SWI and WFI generate "exceptions" which happen after the
execution of the instruction, ie when PC and IT bits have updated.
So the condexec bits at this point are not correct. However, the code
that handles finishing the translation of the TB will write the correct
value of the condexec bits later, so the only effect was that a conditional
Thumb SWI would generate slightly worse code than necessary.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target-arm/translate.c |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)
Aurelien Jarno - Jan. 11, 2011, 11:06 p.m.
On Mon, Jan 10, 2011 at 11:11:49PM +0000, Peter Maydell wrote:
> Remove a redundant call to gen_set_condexec() in the translation of Thumb
> mode SWI. (SWI and WFI generate "exceptions" which happen after the
> execution of the instruction, ie when PC and IT bits have updated.
> So the condexec bits at this point are not correct. However, the code
> that handles finishing the translation of the TB will write the correct
> value of the condexec bits later, so the only effect was that a conditional
> Thumb SWI would generate slightly worse code than necessary.)
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target-arm/translate.c |    1 -
>  1 files changed, 0 insertions(+), 1 deletions(-)

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 2ce82f3..4abece1 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -9014,7 +9014,6 @@ static void disas_thumb_insn(CPUState *env, DisasContext *s)
>  
>          if (cond == 0xf) {
>              /* swi */
> -            gen_set_condexec(s);
>              gen_set_pc_im(s->pc);
>              s->is_jmp = DISAS_SWI;
>              break;
> -- 
> 1.7.1
> 
> 
>

Patch

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 2ce82f3..4abece1 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -9014,7 +9014,6 @@  static void disas_thumb_insn(CPUState *env, DisasContext *s)
 
         if (cond == 0xf) {
             /* swi */
-            gen_set_condexec(s);
             gen_set_pc_im(s->pc);
             s->is_jmp = DISAS_SWI;
             break;