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[GCC/ARM,0/3] Add support for ARMv8-R

Message ID CAKdteObybj16RiScvkZBSoK8Mp+1XZh2E24T_fkyvzo6k7vXPw@mail.gmail.com
State New
Headers show

Commit Message

Christophe Lyon June 29, 2017, 3:12 p.m. UTC 
On 29 June 2017 at 16:37, Thomas Preudhomme
<thomas.preudhomme@foss.arm.com> wrote:
> On 29/06/17 15:34, Christophe Lyon wrote:
>>
>> On 29 June 2017 at 15:52, Thomas Preudhomme
>> <thomas.preudhomme@foss.arm.com> wrote:
>>>
>>> Hi,
>>>
>>> This patch series adds support for the ARMv8-R architecture[1] and ARM
>>> Cortex-R52[2] to GCC. The patch series consist of the following patches:
>>
>>
>> Hi Thomas,
>>
>> I think you need to rebase your patch because Richard's recent series
>> changed the contents
>> of arm-cpu-data.h and arm-cpu-cdata.h.
>
>
> Err yes indeed. Thanks!
>
>>
>> Why do you link armv8-r architecture definition to cortex-r4?
>
>
> I understand, where did I do such a thing?
>

In patch #2 you have:

Both entries point to TARGET_CPU_cortexr4. I guess that's because r52
is only defined in patch #3, but then why not update this in patch #3
are replace r4 with r52?

Not sure I'm very clear :-)

Thanks,

Christophe

> Best regards,
>
> Thomas

Comments

Thomas Preudhomme June 29, 2017, 4:40 p.m. UTC | #1 
On 29/06/17 16:12, Christophe Lyon wrote:
> On 29 June 2017 at 16:37, Thomas Preudhomme
>>
>>>
>>> Why do you link armv8-r architecture definition to cortex-r4?
>>
>>
>> I understand, where did I do such a thing?
>>
> 
> In patch #2 you have:
> diff --git a/gcc/config/arm/arm-cpu-data.h b/gcc/config/arm/arm-cpu-data.h
> index d6200f9bdc09a9d0c973853b0152a2800eaf2fe5..48c1d88032c1c5dc7c6cba71511f79fe9f2533ea
> 100644
> --- a/gcc/config/arm/arm-cpu-data.h
> +++ b/gcc/config/arm/arm-cpu-data.h
> @@ -1478,6 +1478,26 @@ static const struct processors all_architectures[] =
>       NULL
>     },
>     {
> +    "armv8-r", TARGET_CPU_cortexr4,
> +    (TF_CO_PROC),
> +    "8R", BASE_ARCH_8R,
> +    {
> +      ISA_ARMv8r,
> +      isa_nobit
> +    },
> +    NULL
> +  },
> +  {
> +    "armv8-r+crc", TARGET_CPU_cortexr4,
> +    (TF_CO_PROC),
> +    "8R", BASE_ARCH_8R,
> +    {
> +      ISA_ARMv8r,isa_bit_crc32,
> +      isa_nobit
> +    },
> +    NULL
> +  },
> +  {
>       "iwmmxt", TARGET_CPU_iwmmxt,
>       (TF_LDSCHED | TF_STRONG | TF_XSCALE),
>       "5TE", BASE_ARCH_5TE,
> 
> Both entries point to TARGET_CPU_cortexr4. I guess that's because r52
> is only defined in patch #3, but then why not update this in patch #3
> are replace r4 with r52?
> 
> Not sure I'm very clear :-)

You are. I must have forgotten about that setting when working on patch #3. I'll 
update this. Thanks for your vigilance :-)

Best regards,

Thomas
diff mbox

Patch

diff --git a/gcc/config/arm/arm-cpu-data.h b/gcc/config/arm/arm-cpu-data.h
index d6200f9bdc09a9d0c973853b0152a2800eaf2fe5..48c1d88032c1c5dc7c6cba71511f79fe9f2533ea
100644
--- a/gcc/config/arm/arm-cpu-data.h
+++ b/gcc/config/arm/arm-cpu-data.h
@@ -1478,6 +1478,26 @@  static const struct processors all_architectures[] =
     NULL
   },
   {
+    "armv8-r", TARGET_CPU_cortexr4,
+    (TF_CO_PROC),
+    "8R", BASE_ARCH_8R,
+    {
+      ISA_ARMv8r,
+      isa_nobit
+    },
+    NULL
+  },
+  {
+    "armv8-r+crc", TARGET_CPU_cortexr4,
+    (TF_CO_PROC),
+    "8R", BASE_ARCH_8R,
+    {
+      ISA_ARMv8r,isa_bit_crc32,
+      isa_nobit
+    },
+    NULL
+  },
+  {
     "iwmmxt", TARGET_CPU_iwmmxt,
     (TF_LDSCHED | TF_STRONG | TF_XSCALE),
     "5TE", BASE_ARCH_5TE,