@@ -11389,6 +11389,13 @@ static void aarch64_trblock_tb_stop(DisasContextBase *db, CPUState *cpu)
}
}
+static int aarch64_trblock_disas_flags(const DisasContextBase *db)
+{
+ DisasContext *dc = container_of(db, DisasContext, base);
+
+ return 4 | (bswap_code(dc->sctlr_b) ? 2 : 0);
+}
+
void gen_intermediate_code_a64(DisasContextBase *db, ARMCPU *cpu,
TranslationBlock *tb)
{
@@ -11475,11 +11482,12 @@ done_generating:
#ifdef DEBUG_DISAS
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) &&
qemu_log_in_addr_range(db->pc_first)) {
+ int disas_flags = aarch64_trblock_disas_flags(db);
qemu_log_lock();
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(db->pc_first));
log_target_disas(cs, db->pc_first, dc->pc - db->pc_first,
- 4 | (bswap_code(dc->sctlr_b) ? 2 : 0));
+ disas_flags);
qemu_log("\n");
qemu_log_unlock();
}
@@ -12179,6 +12179,13 @@ static void arm_trblock_tb_stop(DisasContextBase *db, CPUState *cpu)
}
}
+static int arm_trblock_disas_flags(const DisasContextBase *db)
+{
+ DisasContext *dc = container_of(db, DisasContext, base);
+
+ return dc->thumb | (dc->sctlr_b << 1);
+}
+
/* generate intermediate code for basic block 'tb'. */
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb)
{
@@ -12274,11 +12281,12 @@ done_generating:
#ifdef DEBUG_DISAS
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) &&
qemu_log_in_addr_range(db->pc_first)) {
+ int disas_flags = arm_trblock_disas_flags(db);
qemu_log_lock();
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(db->pc_first));
log_target_disas(cpu, db->pc_first, dc->pc - db->pc_first,
- dc->thumb | (dc->sctlr_b << 1));
+ disas_flags);
qemu_log("\n");
qemu_log_unlock();
}
Incrementally paves the way towards using the generic instruction translation loop. Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> --- target/arm/translate-a64.c | 10 +++++++++- target/arm/translate.c | 10 +++++++++- 2 files changed, 18 insertions(+), 2 deletions(-)