From patchwork Wed Jun 21 14:29:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roberto Sassu X-Patchwork-Id: 778921 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wt6gb2bJlz9ryr for ; Thu, 22 Jun 2017 00:35:07 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=sourceforge.net header.i=@sourceforge.net header.b="T/SdprrJ"; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=sf.net header.i=@sf.net header.b="GhcUFAs0"; dkim-atps=neutral Received: from localhost ([127.0.0.1] helo=sfs-ml-3.v29.ch3.sourceforge.com) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1dNgii-0002ny-F7; Wed, 21 Jun 2017 14:35:00 +0000 Received: from sog-mx-4.v43.ch3.sourceforge.com ([172.29.43.194] helo=mx.sourceforge.net) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1dNgig-0002no-Ub; Wed, 21 Jun 2017 14:34:58 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sourceforge.net; s=x; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=puUS689XAmq9lQcw6+v9/hlIIalQipACkdtLZ8SpOPs=; b=T/SdprrJo6ih1kVhVWwRMqrehCDVpgKapfe/LGyA8dOIBI7O7xDmlxF0wtYrbEPNa1t3SEiry6VMic6kFks/xPVboamCLr18RiHhjWU0ptiRpzaeL8VXiGcSuwC6KrLlhnOJDEgpOrSQc6g/WGiLTygr88/lJAgDQooNpKz8xks=; DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sf.net; s=x; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=puUS689XAmq9lQcw6+v9/hlIIalQipACkdtLZ8SpOPs=; b=GhcUFAs0GoSS3JpMExBmwLc9ofeLa6EdwoWn/2cflJrllPUMHQRTuzDcLrVnv+MbY22OYjN/gFyhEIjDeAbAxUXUanckzXBssO+ufPh2GKPjoeDlRPUMLx6GXg6evEuRTx+EJoituqyBc2QBf6GYFIrCvpE1P4EiZGbVB1MQ0sE=; Received-SPF: pass (sog-mx-4.v43.ch3.sourceforge.com: domain of huawei.com designates 194.213.3.17 as permitted sender) client-ip=194.213.3.17; envelope-from=roberto.sassu@huawei.com; helo=lhrrgout.huawei.com; Received: from lhrrgout.huawei.com ([194.213.3.17]) by sog-mx-4.v43.ch3.sourceforge.com with esmtps (TLSv1:RC4-SHA:128) (Exim 4.76) id 1dNgid-00070Q-QY; Wed, 21 Jun 2017 14:34:58 +0000 Received: from 172.18.7.190 (EHLO LHREML711-CAH.china.huawei.com) ([172.18.7.190]) by lhrrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DIY23579; Wed, 21 Jun 2017 14:34:41 +0000 (GMT) Received: from roberto-HP-EliteDesk-800-G2-DM-65W.huawei.com (10.204.65.245) by smtpsuk.huawei.com (10.201.108.34) with Microsoft SMTP Server (TLS) id 14.3.301.0; Wed, 21 Jun 2017 15:34:34 +0100 From: Roberto Sassu To: Date: Wed, 21 Jun 2017 16:29:40 +0200 Message-ID: <20170621142941.32674-6-roberto.sassu@huawei.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170621142941.32674-1-roberto.sassu@huawei.com> References: <20170621142941.32674-1-roberto.sassu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.204.65.245] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020201.594A8402.003C, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 657eb80c4d1e23e58c98d3580efaa439 X-Spam-Score: -1.5 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record 0.0 AWL AWL: Adjusted score from AWL reputation of From: address X-Headers-End: 1dNgid-00070Q-QY Subject: [tpmdd-devel] [PATCH v3 5/6] tpm: introduce tpm_get_pcr_banks_info() X-BeenThere: tpmdd-devel@lists.sourceforge.net X-Mailman-Version: 2.1.21 Precedence: list List-Id: Tpm Device Driver maintainance List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-ima-devel@lists.sourceforge.net, linux-security-module@vger.kernel.org, keyrings@vger.kernel.org, linux-kernel@vger.kernel.org Errors-To: tpmdd-devel-bounces@lists.sourceforge.net This function copies the array of tpm_pcr_bank_info structures to the memory address specified by the caller. It assumes that the caller allocated an array with the same number of elements of the active_banks array (member of the tpm_chip structure). This number is defined in include/linux/tpm.h (TPM_ACTIVE_BANKS_MAX definition). A tpm_pcr_bank_info structure is also returned if the TPM version is 1.2. The advantage of this choice is that the code for extending a PCR with multiple digests will work regardless of the TPM version. Signed-off-by: Roberto Sassu --- drivers/char/tpm/tpm-interface.c | 33 +++++++++++++++++++++++++++++++++ drivers/char/tpm/tpm.h | 2 +- include/linux/tpm.h | 8 ++++++++ 3 files changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c index a11598a..cf0cdb2 100644 --- a/drivers/char/tpm/tpm-interface.c +++ b/drivers/char/tpm/tpm-interface.c @@ -916,6 +916,39 @@ int tpm_pcr_extend(u32 chip_num, int pcr_idx, const u8 *hash) EXPORT_SYMBOL_GPL(tpm_pcr_extend); /** + * tpm_get_pcr_banks_info() - get PCR banks information + * @chip_num: tpm idx # or ANY + * @active_banks: array of tpm_pcr_bank_info structures + * + * Return: < 0 on error, and the number of active PCR banks on success. + */ +int tpm_get_pcr_banks_info(u32 chip_num, struct tpm_pcr_bank_info *active_banks) +{ + struct tpm_chip *chip; + int count = 1; + + chip = tpm_chip_find_get(chip_num); + if (chip == NULL) + return -ENODEV; + + if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) { + active_banks[0].alg_id = TPM2_ALG_SHA1; + active_banks[0].crypto_id = HASH_ALGO_SHA1; + active_banks[0].digest_size = hash_digest_size[HASH_ALGO_SHA1]; + goto out; + } + + for (count = 0; count < ARRAY_SIZE(chip->active_banks) && + chip->active_banks[count].alg_id != TPM2_ALG_ERROR; count++) + memcpy(&active_banks[count], &chip->active_banks[count], + sizeof(*active_banks)); +out: + tpm_put_ops(chip); + return count; +} +EXPORT_SYMBOL_GPL(tpm_get_pcr_banks_info); + +/** * tpm_do_selftest - have the TPM continue its selftest and wait until it * can receive further commands * @chip: TPM chip to use diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index d285bc6..75ec0d1 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h @@ -208,7 +208,7 @@ struct tpm_chip { const struct attribute_group *groups[3]; unsigned int groups_cnt; - struct tpm_pcr_bank_info active_banks[7]; + struct tpm_pcr_bank_info active_banks[TPM_ACTIVE_BANKS_MAX]; #ifdef CONFIG_ACPI acpi_handle acpi_dev_handle; char ppi_version[TPM_PPI_VERSION_LEN + 1]; diff --git a/include/linux/tpm.h b/include/linux/tpm.h index ff06738..49ec8fc 100644 --- a/include/linux/tpm.h +++ b/include/linux/tpm.h @@ -25,6 +25,7 @@ #include #define TPM_DIGEST_SIZE 20 /* Max TPM v1.2 PCR size */ +#define TPM_ACTIVE_BANKS_MAX 7 /* Max num of active banks for TPM 2.0 */ /* * Chip num is this value or a valid tpm idx @@ -76,6 +77,8 @@ struct tpm_pcr_bank_info { extern int tpm_is_tpm2(u32 chip_num); extern int tpm_pcr_read(u32 chip_num, int pcr_idx, u8 *res_buf); extern int tpm_pcr_extend(u32 chip_num, int pcr_idx, const u8 *hash); +extern int tpm_get_pcr_banks_info(u32 chip_num, + struct tpm_pcr_bank_info *active_banks); extern int tpm_send(u32 chip_num, void *cmd, size_t buflen); extern int tpm_get_random(u32 chip_num, u8 *data, size_t max); extern int tpm_seal_trusted(u32 chip_num, @@ -95,6 +98,11 @@ static inline int tpm_pcr_read(u32 chip_num, int pcr_idx, u8 *res_buf) { static inline int tpm_pcr_extend(u32 chip_num, int pcr_idx, const u8 *hash) { return -ENODEV; } +static inline int tpm_get_pcr_banks_info(u32 chip_num, + struct tpm_pcr_bank_info *active_banks) +{ + return -ENODEV; +} static inline int tpm_send(u32 chip_num, void *cmd, size_t buflen) { return -ENODEV; }