From patchwork Wed Jun 21 14:29:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roberto Sassu X-Patchwork-Id: 778918 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wt6fd6RZCz9s72 for ; Thu, 22 Jun 2017 00:34:17 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=sourceforge.net header.i=@sourceforge.net header.b="WucObZt5"; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=sf.net header.i=@sf.net header.b="V+m+uvLe"; dkim-atps=neutral Received: from localhost ([127.0.0.1] helo=sfs-ml-1.v29.ch3.sourceforge.com) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1dNght-00071h-FD; Wed, 21 Jun 2017 14:34:09 +0000 Received: from sog-mx-2.v43.ch3.sourceforge.com ([172.29.43.192] helo=mx.sourceforge.net) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1dNghs-00071Z-Is; Wed, 21 Jun 2017 14:34:08 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sourceforge.net; s=x; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=UeT5vSn4KEFw/Z6MAf+nSQia5H2mhRaYatasFWMFiaQ=; b=WucObZt5qnqt2xUxzQN71OJpN4t/4xSdEY1HttuGtzIVfiVxIzUi02G6IsWbAt+Txdg+AV3DRzGferKIki9iWz7bd94Q6o/Trl5vkXGI65N1F8ILtRdkqEY6enQADL/9lpoCjWz4GQjnpeiXNdoZfFHZxIZZcgI4arMYLen9ypI=; DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sf.net; s=x; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=UeT5vSn4KEFw/Z6MAf+nSQia5H2mhRaYatasFWMFiaQ=; b=V+m+uvLec7063u1s6/9eZRDY7cZ8W0iTuCqkuolZ0GLpPu57Z7qH90ZCJ7nxjhmmwiQyuMxBxZ3LTNtMJDgJh8ruQAUWBUptA6PtQltIoRHWLs3n35FzjFgPy4U053vDQAPEJvjbDO8KmKs7ZCUHd0lX1ybIC2vsxsgQhPqATB8=; Received-SPF: pass (sog-mx-2.v43.ch3.sourceforge.com: domain of huawei.com designates 194.213.3.17 as permitted sender) client-ip=194.213.3.17; envelope-from=roberto.sassu@huawei.com; helo=lhrrgout.huawei.com; Received: from lhrrgout.huawei.com ([194.213.3.17]) by sog-mx-2.v43.ch3.sourceforge.com with esmtps (TLSv1:RC4-SHA:128) (Exim 4.76) id 1dNghq-000053-Ic; Wed, 21 Jun 2017 14:34:08 +0000 Received: from 172.18.7.190 (EHLO LHREML711-CAH.china.huawei.com) ([172.18.7.190]) by lhrrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DPO49357; Wed, 21 Jun 2017 14:33:57 +0000 (GMT) Received: from roberto-HP-EliteDesk-800-G2-DM-65W.huawei.com (10.204.65.245) by smtpsuk.huawei.com (10.201.108.34) with Microsoft SMTP Server (TLS) id 14.3.301.0; Wed, 21 Jun 2017 15:33:29 +0100 From: Roberto Sassu To: Date: Wed, 21 Jun 2017 16:29:38 +0200 Message-ID: <20170621142941.32674-4-roberto.sassu@huawei.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170621142941.32674-1-roberto.sassu@huawei.com> References: <20170621142941.32674-1-roberto.sassu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.204.65.245] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090206.594A83D5.0128, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: fb80c7dd079e7fd430e26cc4f3448586 X-Spam-Score: -1.5 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record 0.0 AWL AWL: Adjusted score from AWL reputation of From: address X-Headers-End: 1dNghq-000053-Ic Subject: [tpmdd-devel] [PATCH v3 3/6] tpm: introduce tpm_pcr_bank_info structure with digest_size from TPM X-BeenThere: tpmdd-devel@lists.sourceforge.net X-Mailman-Version: 2.1.21 Precedence: list List-Id: Tpm Device Driver maintainance List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-ima-devel@lists.sourceforge.net, linux-security-module@vger.kernel.org, keyrings@vger.kernel.org, linux-kernel@vger.kernel.org Errors-To: tpmdd-devel-bounces@lists.sourceforge.net This patch introduces the new structure tpm_pcr_bank_info to store information regarding PCR banks. The next patch will replace the array of TPM algorithms IDs with an array of the new structure. tpm_pcr_bank_info contains the TPM algorithm ID, the digest size and, optionally, the corresponding crypto ID, if a mapping exists. These information will be used by IMA to calculate the digest of an event and to provide measurements logs to userspace applications. The new structure has been defined in include/linux/tpm.h, as it will be passed to functions outside the TPM driver. The purpose of this patch is to fix a serious issue in tpm2_pcr_extend(): if the mapping between a TPM algorithm and a crypto algorithm is not defined, the PCR bank with the unknown algorithm is not extended. This gives the opportunity to an attacker to reply to remote attestation requests with a list of fake measurements. Instead, the digest size is retrieved from the output buffer of a PCR read, without relying on the crypto subsystem. Signed-off-by: Roberto Sassu --- drivers/char/tpm/tpm.h | 11 ----------- drivers/char/tpm/tpm2-cmd.c | 30 ++++++++++++++++++++++++++++++ include/linux/tpm.h | 19 +++++++++++++++++++ 3 files changed, 49 insertions(+), 11 deletions(-) diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index 1df0521..62c600d 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h @@ -98,17 +98,6 @@ enum tpm2_return_codes { TPM2_RC_REFERENCE_H0 = 0x0910, }; -enum tpm2_algorithms { - TPM2_ALG_ERROR = 0x0000, - TPM2_ALG_SHA1 = 0x0004, - TPM2_ALG_KEYEDHASH = 0x0008, - TPM2_ALG_SHA256 = 0x000B, - TPM2_ALG_SHA384 = 0x000C, - TPM2_ALG_SHA512 = 0x000D, - TPM2_ALG_NULL = 0x0010, - TPM2_ALG_SM3_256 = 0x0012, -}; - enum tpm2_command_codes { TPM2_CC_FIRST = 0x011F, TPM2_CC_SELF_TEST = 0x0143, diff --git a/drivers/char/tpm/tpm2-cmd.c b/drivers/char/tpm/tpm2-cmd.c index 6a9fe0d..74a68ea 100644 --- a/drivers/char/tpm/tpm2-cmd.c +++ b/drivers/char/tpm/tpm2-cmd.c @@ -992,6 +992,36 @@ int tpm2_probe(struct tpm_chip *chip) } EXPORT_SYMBOL_GPL(tpm2_probe); +static int tpm2_init_pcr_bank_info(struct tpm_chip *chip, u16 alg_id, + struct tpm_pcr_bank_info *active_bank) +{ + struct tpm_buf buf; + struct tpm2_pcr_read_out *pcrread_out; + int rc = 0; + int i; + + active_bank->alg_id = alg_id; + + rc = tpm2_pcr_read_tpm_buf(chip, 0, alg_id, &buf, NULL); + if (rc) + goto out; + + pcrread_out = (struct tpm2_pcr_read_out *)&buf.data[TPM_HEADER_SIZE]; + + active_bank->digest_size = be16_to_cpu(pcrread_out->digest_size); + active_bank->crypto_id = HASH_ALGO__LAST; + + for (i = 0; i < ARRAY_SIZE(tpm2_hash_map); i++) { + if (active_bank->alg_id != tpm2_hash_map[i].tpm_id) + continue; + + active_bank->crypto_id = tpm2_hash_map[i].crypto_id; + } +out: + tpm_buf_destroy(&buf); + return rc; +} + struct tpm2_pcr_selection { __be16 hash_alg; u8 size_of_select; diff --git a/include/linux/tpm.h b/include/linux/tpm.h index 5a090f5..ff06738 100644 --- a/include/linux/tpm.h +++ b/include/linux/tpm.h @@ -22,6 +22,8 @@ #ifndef __LINUX_TPM_H__ #define __LINUX_TPM_H__ +#include + #define TPM_DIGEST_SIZE 20 /* Max TPM v1.2 PCR size */ /* @@ -37,6 +39,17 @@ enum TPM_OPS_FLAGS { TPM_OPS_AUTO_STARTUP = BIT(0), }; +enum tpm2_algorithms { + TPM2_ALG_ERROR = 0x0000, + TPM2_ALG_SHA1 = 0x0004, + TPM2_ALG_KEYEDHASH = 0x0008, + TPM2_ALG_SHA256 = 0x000B, + TPM2_ALG_SHA384 = 0x000C, + TPM2_ALG_SHA512 = 0x000D, + TPM2_ALG_NULL = 0x0010, + TPM2_ALG_SM3_256 = 0x0012, +}; + struct tpm_class_ops { unsigned int flags; const u8 req_complete_mask; @@ -52,6 +65,12 @@ struct tpm_class_ops { void (*relinquish_locality)(struct tpm_chip *chip, int loc); }; +struct tpm_pcr_bank_info { + enum tpm2_algorithms alg_id; + enum hash_algo crypto_id; + u32 digest_size; +}; + #if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE) extern int tpm_is_tpm2(u32 chip_num);